[RFC PATCH 0/4] bus: ti-sysc: Add generic enable/disable & PRUSS

[RFC PATCH 0/4] bus: ti-sysc: Add generic enable/disable & PRUSS

[Roger Quadros]

Hi Tony,

Non legacy modules will rely on generic enable/disable functions.

I had to disable usb_otg_ss3 and 4 on am57xx idk to be able to boot.
It is explicitly stated in TRM to not use USB3 and 4 on AM57xx, and
I haven't seen any dra7 based board using them so let's keep it disabled.

Handle the PRU-ICSS type as it needs some special handling especially
during suspend/resume.

cheers,
-roger

Roger Quadros (4):
  ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled
  bus: ti-sysc: Add generic enable/disable functions
  bus: ti-sysc: Add support for PRU-ICSS type
  bus: ti-sysc: Ensure PRU-ICSS doesn't break suspend/resume

 .../devicetree/bindings/bus/ti-sysc.txt       |   1 +
 arch/arm/boot/dts/dra7-l4.dtsi                |   2 +
 drivers/bus/ti-sysc.c                         | 171 ++++++++++++++++++
 include/linux/platform_data/ti-sysc.h         |   7 +-
 4 files changed, 180 insertions(+), 1 deletion(-)

-- 
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[RFC PATCH 1/4] ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled

[Roger Quadros]

These 2 modules are not present on all families (e.g. AM57).
Keep them disabled.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/dra7-l4.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
index 414f1cd68733..40e7281c12f7 100644
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -4120,6 +4120,7 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x0 0x100000 0x20000>;
+			status = "disabled";
 
 			omap_dwc3_3: omap_dwc3_3@0 {
 				compatible = "ti,dwc3";
@@ -4169,6 +4170,7 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x0 0x140000 0x20000>;
+			status = "disabled";
 		};
 
 		target-module@170000 {			/* 0x48970000, ap 21 0a.0 */
-- 
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[RFC PATCH 2/4] bus: ti-sysc: Add generic enable/disable functions

[Roger Quadros]

For non legacy cases, add generic sysc_enable_module()
and sysc_disable_module() functions.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 drivers/bus/ti-sysc.c | 114 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 114 insertions(+)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 5c0dd80021cc..1e63b6265764 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -793,6 +793,112 @@ static void sysc_show_registers(struct sysc *ddata)
 		buf);
 }
 
+#define SYSC_IDLE_MASK	(SYSC_NR_IDLEMODES - 1)
+
+static int sysc_enable_module(struct device *dev)
+{
+	struct sysc *ddata;
+	const struct sysc_regbits *regbits;
+	u32 reg, idlemodes, best_mode;
+
+	ddata = dev_get_drvdata(dev);
+	if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
+		return 0;
+
+	regbits = ddata->cap->regbits;
+	reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
+
+	/* Set SIDLE mode */
+	idlemodes = ddata->cfg.sidlemodes;
+	if (!idlemodes || regbits->sidle_shift < 0)
+		goto set_midle;
+
+	best_mode = fls(ddata->cfg.sidlemodes) - 1;
+	if (best_mode > SYSC_IDLE_MASK) {
+		dev_err(dev, "%s: invalid sidlemode\n", __func__);
+		return -EINVAL;
+	}
+
+	reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
+	reg |= best_mode << regbits->sidle_shift;
+	sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+
+set_midle:
+	/* Set MIDLE mode */
+	idlemodes = ddata->cfg.midlemodes;
+	if (!idlemodes || regbits->midle_shift < 0)
+		return 0;
+
+	best_mode = fls(ddata->cfg.midlemodes) - 1;
+	if (best_mode > SYSC_IDLE_MASK) {
+		dev_err(dev, "%s: invalid midlemode\n", __func__);
+		return -EINVAL;
+	}
+
+	reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
+	reg |= best_mode << regbits->midle_shift;
+	sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+
+	return 0;
+}
+
+static int sysc_disable_module(struct device *dev)
+{
+	struct sysc *ddata;
+	const struct sysc_regbits *regbits;
+	u32 reg, idlemodes, best_mode;
+
+	ddata = dev_get_drvdata(dev);
+	if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
+		return 0;
+
+	regbits = ddata->cap->regbits;
+	reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
+
+	/* Set MIDLE mode */
+	idlemodes = ddata->cfg.midlemodes;
+	if (!idlemodes || regbits->midle_shift < 0)
+		goto set_sidle;
+
+	if (idlemodes & BIT(SYSC_IDLE_SMART_WKUP)) {
+		best_mode = SYSC_IDLE_SMART_WKUP;
+	} else if (idlemodes & BIT(SYSC_IDLE_SMART)) {
+		best_mode = SYSC_IDLE_SMART;
+	} else if (idlemodes & SYSC_IDLE_FORCE) {
+		best_mode = SYSC_IDLE_FORCE;
+	} else {
+		dev_err(dev, "%s: invalid midlemode\n", __func__);
+		return -EINVAL;
+	}
+
+	reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
+	reg |= best_mode << regbits->midle_shift;
+	sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+
+set_sidle:
+	/* Set SIDLE mode */
+	idlemodes = ddata->cfg.sidlemodes;
+	if (!idlemodes || regbits->sidle_shift < 0)
+		return 0;
+
+	if (idlemodes & BIT(SYSC_IDLE_SMART_WKUP)) {
+		best_mode = SYSC_IDLE_SMART_WKUP;
+	} else if (idlemodes & BIT(SYSC_IDLE_SMART)) {
+		best_mode = SYSC_IDLE_SMART;
+	} else if (idlemodes & SYSC_IDLE_FORCE) {
+		best_mode = SYSC_IDLE_FORCE;
+	} else {
+		dev_err(dev, "%s: invalid sidlemode\n", __func__);
+		return -EINVAL;
+	}
+
+	reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
+	reg |= best_mode << regbits->sidle_shift;
+	sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+
+	return 0;
+}
+
 static int __maybe_unused sysc_runtime_suspend_legacy(struct device *dev,
 						      struct sysc *ddata)
 {
@@ -849,6 +955,10 @@ static int __maybe_unused sysc_runtime_suspend(struct device *dev)
 		error = sysc_runtime_suspend_legacy(dev, ddata);
 		if (error)
 			return error;
+	} else {
+		error = sysc_disable_module(dev);
+		if (error)
+			return error;
 	}
 
 	sysc_disable_main_clocks(ddata);
@@ -885,6 +995,10 @@ static int __maybe_unused sysc_runtime_resume(struct device *dev)
 		error = sysc_runtime_resume_legacy(dev, ddata);
 		if (error)
 			goto err_main_clocks;
+	} else {
+		error = sysc_enable_module(dev);
+		if (error)
+			goto err_main_clocks;
 	}
 
 	ddata->enabled = true;
-- 
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[RFC PATCH 3/4] bus: ti-sysc: Add support for PRU-ICSS type

[Roger Quadros]

The PRU-ICSS moduels has a SYSCONFIG register that is
similar to omap4-simple but with 2 speacial register bits.

Let's add a new type for that so we can deal with any
PRU-ICSS specific details if required.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 .../devicetree/bindings/bus/ti-sysc.txt       |  1 +
 drivers/bus/ti-sysc.c                         | 21 +++++++++++++++++++
 include/linux/platform_data/ti-sysc.h         |  7 ++++++-
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.txt b/Documentation/devicetree/bindings/bus/ti-sysc.txt
index f200f45572ae..f9716c841ecd 100644
--- a/Documentation/devicetree/bindings/bus/ti-sysc.txt
+++ b/Documentation/devicetree/bindings/bus/ti-sysc.txt
@@ -38,6 +38,7 @@ Required standard properties:
 		"ti,sysc-dra7-mcasp"
 		"ti,sysc-usb-host-fs"
 		"ti,sysc-dra7-mcan"
+		"ti,sysc-pruss"
 
 - reg		shall have register areas implemented for the interconnect
 		target module in question such as revision, sysc and syss
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 1e63b6265764..e4ab4d422ea5 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -1993,6 +1993,26 @@ static const struct sysc_capabilities sysc_dra7_mcan = {
 	.regbits = &sysc_regbits_dra7_mcan,
 };
 
+/*
+ * PRU-ICSS, similar to omap4-simple but has special bits
+ */
+static const struct sysc_regbits sysc_regbits_pruss = {
+	.dmadisable_shift = -ENODEV,
+	.midle_shift = 2,
+	.sidle_shift = 0,
+	.clkact_shift = -ENODEV,
+	.enwkup_shift = -ENODEV,
+	.srst_shift = -ENODEV,
+	.emufree_shift = -ENODEV,
+	.autoidle_shift = -ENODEV,
+	.standby_init_shift = 4,
+	.sub_mwait_shift = 5,
+};
+
+static const struct sysc_capabilities sysc_pruss = {
+	.type = TI_SYSC_PRUSS,
+	.regbits = &sysc_regbits_pruss,
+};
 static int sysc_init_pdata(struct sysc *ddata)
 {
 	struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
@@ -2186,6 +2206,7 @@ static const struct of_device_id sysc_match[] = {
 	{ .compatible = "ti,sysc-usb-host-fs",
 	  .data = &sysc_omap4_usb_host_fs, },
 	{ .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
+	{ .compatible = "ti,sysc-pruss", .data = &sysc_pruss, },
 	{  },
 };
 MODULE_DEVICE_TABLE(of, sysc_match);
diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h
index 9256c0305968..bb95ae7da56c 100644
--- a/include/linux/platform_data/ti-sysc.h
+++ b/include/linux/platform_data/ti-sysc.h
@@ -15,6 +15,7 @@ enum ti_sysc_module_type {
 	TI_SYSC_OMAP4_MCASP,
 	TI_SYSC_OMAP4_USB_HOST_FS,
 	TI_SYSC_DRA7_MCAN,
+	TI_SYSC_PRUSS,
 };
 
 struct ti_sysc_cookie {
@@ -30,7 +31,9 @@ struct ti_sysc_cookie {
  * @srst_shift: Offset of the softreset bit
  * @autoidle_shift: Offset of the autoidle bit
  * @dmadisable_shift: Offset of the dmadisable bit
- * @emufree_shift; Offset of the emufree bit
+ * @emufree_shift: Offset of the emufree bit
+ * @standby_init_shift: Offset to standby_init bit
+ * @sub_mwait_shift: Offset to sub_mwait bit
  *
  * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
  * feature is not available.
@@ -44,6 +47,8 @@ struct sysc_regbits {
 	s8 autoidle_shift;
 	s8 dmadisable_shift;
 	s8 emufree_shift;
+	s8 standby_init_shift;
+	s8 sub_mwait_shift;
 };
 
 #define SYSC_QUIRK_SWSUP_MSTANDBY	BIT(13)
-- 
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[RFC PATCH 4/4] bus: ti-sysc: Ensure PRU-ICSS doesn't break suspend/resume

[Roger Quadros]

The PRU-ICSS subsystem's SYSCONFIG register is similar to
omap4-simple but has 2 special bits STANDBY_INIT and SUB_MWAIT.

The STANDBY_INIT bit initiates a Standby sequence (when set) and
triggers a MStandby request to the SoC's PRCM module. This same
bit is also used to enable the OCP master ports (when cleared).

Some PRU applications require the OCP master port access to be
enabled thus keeping it out of standby.
During sustem suspend/resume we must ensure that the PRUSS is in
standby else it will break resume.

NOTE:
1. This patch only adds the PM callbacks with code to fix the System
Suspend/Resume hang issue on AM33xx/AM437x SoCs, but does not
implement the full context save and restore required for the PRUSS
drivers to work across system suspend/resume when the power domain
is switched off (L4PER domain is switched OFF on AM335x/AM437x
during system suspend/resume, so PRUSS modules do lose context).
2. The PRUSS driver functionality on AM57xx SoCs is not affected that
much because the PER power domain to which the PRUSS IPs belong is
not switched OFF during suspend/resume.

Based on work by Suman Anna.

Cc: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 drivers/bus/ti-sysc.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index e4ab4d422ea5..9c94ce08dd36 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -71,6 +71,7 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = {
  * @name: name if available
  * @revision: interconnect target module revision
  * @needs_resume: runtime resume needed on resume from suspend
+ * @in_standby: flag used by PRUSS type during suspend/resume
  */
 struct sysc {
 	struct device *dev;
@@ -92,6 +93,7 @@ struct sysc {
 	bool enabled;
 	bool needs_resume;
 	bool child_needs_resume;
+	bool in_standby;
 	struct delayed_work idle_work;
 };
 
@@ -1023,6 +1025,21 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
 	if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
 		return 0;
 
+	if (ddata->cap->type == TI_SYSC_PRUSS) {
+		u32 reg, mask;
+		const struct sysc_regbits *regbits = ddata->cap->regbits;
+
+		mask = BIT(regbits->standby_init_shift);
+		reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
+		ddata->in_standby = reg & mask;
+
+		/* initiate MStandby */
+		if (!ddata->in_standby) {
+			reg |= mask;
+			sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+		}
+	}
+
 	return pm_runtime_force_suspend(dev);
 }
 
@@ -1035,6 +1052,25 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev)
 	if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
 		return 0;
 
+	if (ddata->cap->type == TI_SYSC_PRUSS && !ddata->in_standby) {
+		u32 reg;
+		const struct sysc_regbits *regbits = ddata->cap->regbits;
+
+		/* re-enable OCP master ports/disable MStandby */
+		reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
+		reg &= ~BIT(regbits->standby_init_shift);
+		sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
+		ddata->in_standby = 0;
+
+		/* wait till ready for transactions - delay is arbitrary */
+		usleep_range(50, 100);
+		reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
+		if (reg & BIT(regbits->sub_mwait_shift)) {
+			dev_err(dev, "timeout waiting for SUB_MWAIT_READY\n");
+			return -ETIMEDOUT;
+		}
+	}
+
 	return pm_runtime_force_resume(dev);
 }
 
-- 
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Re: [RFC PATCH 0/4] bus: ti-sysc: Add generic enable/disable & PRUSS

[Roger Quadros]

On 02/04/2019 16:37, Roger Quadros wrote:
> Hi Tony,
> 
> Non legacy modules will rely on generic enable/disable functions.
> 
> I had to disable usb_otg_ss3 and 4 on am57xx idk to be able to boot.
> It is explicitly stated in TRM to not use USB3 and 4 on AM57xx, and
> I haven't seen any dra7 based board using them so let's keep it disabled.
> 
> Handle the PRU-ICSS type as it needs some special handling especially
> during suspend/resume.

I forgot to mention that this must be applied on top of
https://lkml.org/lkml/2019/3/25/1180

> 
> cheers,
> -roger
> 
> Roger Quadros (4):
>   ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled
>   bus: ti-sysc: Add generic enable/disable functions
>   bus: ti-sysc: Add support for PRU-ICSS type
>   bus: ti-sysc: Ensure PRU-ICSS doesn't break suspend/resume
> 
>  .../devicetree/bindings/bus/ti-sysc.txt       |   1 +
>  arch/arm/boot/dts/dra7-l4.dtsi                |   2 +
>  drivers/bus/ti-sysc.c                         | 171 ++++++++++++++++++
>  include/linux/platform_data/ti-sysc.h         |   7 +-
>  4 files changed, 180 insertions(+), 1 deletion(-)
> 

-- 
cheers,
-roger

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Re: [RFC PATCH 1/4] ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [190402 13:38]:
> These 2 modules are not present on all families (e.g. AM57).
> Keep them disabled.

Can you please add comments to the dtsi file for why "disabled"
is set? Otherwise we may end up removing them at some point as
the default should be just enabled with no status property.

If these devices are really there for some SoCs, we should
have a separate dtsi for them.

Regards,

Tony

Re: [RFC PATCH 4/4] bus: ti-sysc: Ensure PRU-ICSS doesn't break suspend/resume

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [190402 13:38]:
> The PRU-ICSS subsystem's SYSCONFIG register is similar to
> omap4-simple but has 2 special bits STANDBY_INIT and SUB_MWAIT.
> 
> The STANDBY_INIT bit initiates a Standby sequence (when set) and
> triggers a MStandby request to the SoC's PRCM module. This same
> bit is also used to enable the OCP master ports (when cleared).
> 
> Some PRU applications require the OCP master port access to be
> enabled thus keeping it out of standby.

So do we need to configure this depending on the application?

> During sustem suspend/resume we must ensure that the PRUSS is in
> standby else it will break resume.
> 
> NOTE:
> 1. This patch only adds the PM callbacks with code to fix the System
> Suspend/Resume hang issue on AM33xx/AM437x SoCs, but does not
> implement the full context save and restore required for the PRUSS
> drivers to work across system suspend/resume when the power domain
> is switched off (L4PER domain is switched OFF on AM335x/AM437x
> during system suspend/resume, so PRUSS modules do lose context).

I think we already restore the interconnect target module access
properly on resume. If not we should fix that.

Saving and restoring the child device state is up to the device
drivers managing the child device(s), and there's not much ti-sysc.c
can do about it, right?

> @@ -92,6 +93,7 @@ struct sysc {
>  	bool enabled;
>  	bool needs_resume;
>  	bool child_needs_resume;
> +	bool in_standby;
>  	struct delayed_work idle_work;
>  };

We should start using bitfields for the bool here, might as well
already do it now:

unsigned long in_standby:1;

See "17) Using bool" in Documentation/process/coding-style.rst.

> @@ -1023,6 +1025,21 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
>  	if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
>  		return 0;
>  
> +	if (ddata->cap->type == TI_SYSC_PRUSS) {

Should this test be made more generic based on the mstandby
bit being configured?

And can you please make these into separate functions to
avoid cluttering the suspend and resume functions. Something
like sysc_handle_mstandby() maybe?

> +		u32 reg, mask;
> +		const struct sysc_regbits *regbits = ddata->cap->regbits;
> +
> +		mask = BIT(regbits->standby_init_shift);
> +		reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
> +		ddata->in_standby = reg & mask;

Hmm so could we just assume that the device drivers for child device(s)
configure the MSTANDBY bit? Or do we need to manage it in ti-sysc?

See for example drivers/usb/musb/omap2430.c omap2430_low_level_init()
and omap2430_low_level_exit(). That's a separate register though.

Regards,

Tony

Re: [RFC PATCH 2/4] bus: ti-sysc: Add generic enable/disable functions

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [190402 13:38]:
> For non legacy cases, add generic sysc_enable_module()
> and sysc_disable_module() functions.

Looks OK to me. Can you please add a comment mentioning that we're
not currently blocking clockdomain autoidle? See clkdm_deny_idle()
use in omap_hwmod.c.

> +	if (idlemodes & BIT(SYSC_IDLE_SMART_WKUP)) {
> +		best_mode = SYSC_IDLE_SMART_WKUP;
> +	} else if (idlemodes & BIT(SYSC_IDLE_SMART)) {
> +		best_mode = SYSC_IDLE_SMART;
> +	} else if (idlemodes & SYSC_IDLE_FORCE) {
> +		best_mode = SYSC_IDLE_FORCE;
> +	} else {
> +		dev_err(dev, "%s: invalid midlemode\n", __func__);
> +		return -EINVAL;
> +	}
...

> +	if (idlemodes & BIT(SYSC_IDLE_SMART_WKUP)) {
> +		best_mode = SYSC_IDLE_SMART_WKUP;
> +	} else if (idlemodes & BIT(SYSC_IDLE_SMART)) {
> +		best_mode = SYSC_IDLE_SMART;
> +	} else if (idlemodes & SYSC_IDLE_FORCE) {
> +		best_mode = SYSC_IDLE_FORCE;
> +	} else {
> +		dev_err(dev, "%s: invalid sidlemode\n", __func__);
> +		return -EINVAL;
> +	}

Can you please add a helper function for getting the best
idle mode?

Regards,

Tony

Re: [RFC PATCH 1/4] ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled

[Roger Quadros]

On 02/04/2019 19:22, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [190402 13:38]:
>> These 2 modules are not present on all families (e.g. AM57).
>> Keep them disabled.
> 
> Can you please add comments to the dtsi file for why "disabled"
> is set? Otherwise we may end up removing them at some point as
> the default should be just enabled with no status property.
> 
> If these devices are really there for some SoCs, we should
> have a separate dtsi for them.

They are there on J6 variants but not on AM5 variants.

OK. I will move them to a separate dtsi and include them in the
right variants.

The patch can be independent of this series.

-- 
cheers,
-roger
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [RFC PATCH 4/4] bus: ti-sysc: Ensure PRU-ICSS doesn't break suspend/resume

[Roger Quadros]

On 02/04/2019 19:57, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [190402 13:38]:
>> The PRU-ICSS subsystem's SYSCONFIG register is similar to
>> omap4-simple but has 2 special bits STANDBY_INIT and SUB_MWAIT.
>>
>> The STANDBY_INIT bit initiates a Standby sequence (when set) and
>> triggers a MStandby request to the SoC's PRCM module. This same
>> bit is also used to enable the OCP master ports (when cleared).
>>
>> Some PRU applications require the OCP master port access to be
>> enabled thus keeping it out of standby.
> 
> So do we need to configure this depending on the application?

Yes.
> 
>> During sustem suspend/resume we must ensure that the PRUSS is in
>> standby else it will break resume.
>>
>> NOTE:
>> 1. This patch only adds the PM callbacks with code to fix the System
>> Suspend/Resume hang issue on AM33xx/AM437x SoCs, but does not
>> implement the full context save and restore required for the PRUSS
>> drivers to work across system suspend/resume when the power domain
>> is switched off (L4PER domain is switched OFF on AM335x/AM437x
>> during system suspend/resume, so PRUSS modules do lose context).
> 
> I think we already restore the interconnect target module access
> properly on resume. If not we should fix that.
> 
> Saving and restoring the child device state is up to the device
> drivers managing the child device(s), and there's not much ti-sysc.c
> can do about it, right?

Agreed. In that case this handling should be done by pruss.c
and uio_pruss.c in their suspend/resume handlers.

Suman, do you agree?

> 
>> @@ -92,6 +93,7 @@ struct sysc {
>>  	bool enabled;
>>  	bool needs_resume;
>>  	bool child_needs_resume;
>> +	bool in_standby;
>>  	struct delayed_work idle_work;
>>  };
> 
> We should start using bitfields for the bool here, might as well
> already do it now:
> 
> unsigned long in_standby:1;
> 
> See "17) Using bool" in Documentation/process/coding-style.rst.
> 
>> @@ -1023,6 +1025,21 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev)
>>  	if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
>>  		return 0;
>>  
>> +	if (ddata->cap->type == TI_SYSC_PRUSS) {
> 
> Should this test be made more generic based on the mstandby
> bit being configured?

No other module uses this bit. It is specific to PRUSS.
> 
> And can you please make these into separate functions to
> avoid cluttering the suspend and resume functions. Something
> like sysc_handle_mstandby() maybe?
> 
>> +		u32 reg, mask;
>> +		const struct sysc_regbits *regbits = ddata->cap->regbits;
>> +
>> +		mask = BIT(regbits->standby_init_shift);
>> +		reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
>> +		ddata->in_standby = reg & mask;
> 
> Hmm so could we just assume that the device drivers for child device(s)
> configure the MSTANDBY bit? Or do we need to manage it in ti-sysc?
> 

I'm in favor of managing it in the child device driver.
Let's see if Suman has any concerns.

> See for example drivers/usb/musb/omap2430.c omap2430_low_level_init()
> and omap2430_low_level_exit(). That's a separate register though.
> 

--
cheers,
-roger 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [RFC PATCH 1/4] ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled

[Roger Quadros]

Tony,

On 02/04/2019 19:22, Tony Lindgren wrote:
> * Roger Quadros <rogerq@ti.com> [190402 13:38]:
>> These 2 modules are not present on all families (e.g. AM57).
>> Keep them disabled.
> 
> Can you please add comments to the dtsi file for why "disabled"
> is set? Otherwise we may end up removing them at some point as
> the default should be just enabled with no status property.
> 
> If these devices are really there for some SoCs, we should
> have a separate dtsi for them.
> 
> Regards,
> 
> Tony
> 

Below patch is just to get initial feedback. Is the overall approach of splitting
into DRA7 vs AM5 dtsi files OK?

From 12d3b0086dbf59acc57dddb6e6037d3c5c09878a Mon Sep 17 00:00:00 2001
From: Roger Quadros <rogerq@ti.com>
Date: Wed, 3 Apr 2019 16:08:54 +0300
Subject: [PATCH] ARM: dts: dra7: Seperate AM5 and DRA7 dtsi files

AM5 and DRA7 SoC families have different set of modules
in them so the SoC specific dtsi files need to be separated.

e.g. Some of the major differences between AM576 and DRA76

		DRA76x	AM576x

USB3		x
USB4		x
ATL		x
VCP		x
MLB		x
ISS		x
PRU-ICSS1		x
PRU-ICSS2		x

This patch only deals with moving USB3 and USB4 to DRA7
specific files. PRU-ICSS support is not yet added. It can
be added to AM5 specific files.

Signed-off-by: Roger Quadros <rogerq@ti.com>
---
 arch/arm/boot/dts/am5718.dtsi                 |   5 +
 arch/arm/boot/dts/am571x-idk.dts              |   2 +-
 arch/arm/boot/dts/am5728.dtsi                 |   6 +
 arch/arm/boot/dts/am572x-idk.dts              |   5 +-
 arch/arm/boot/dts/am5748.dtsi                 |   5 +
 arch/arm/boot/dts/am574x-idk.dts              |   4 +-
 arch/arm/boot/dts/am57xx-cl-som-am57x.dts     |   2 +-
 arch/arm/boot/dts/dra7-l4-jacinto.dtsi        |  73 +++++++++
 arch/arm/boot/dts/dra7-l4.dtsi                |  74 +--------
 .../dts/{dra72x.dtsi => dra72x-common.dtsi}   |   2 -
 arch/arm/boot/dts/dra72x.dtsi                 |  62 +-------
 .../dts/{dra74x.dtsi => dra74x-common.dtsi}   |   2 -
 arch/arm/boot/dts/dra74x.dtsi                 | 147 +-----------------
 .../dts/{dra76x.dtsi => dra76x-common.dtsi}   |   2 -
 arch/arm/boot/dts/dra76x.dtsi                 |  81 +---------
 15 files changed, 103 insertions(+), 369 deletions(-)
 create mode 100644 arch/arm/boot/dts/am5718.dtsi
 create mode 100644 arch/arm/boot/dts/am5728.dtsi
 create mode 100644 arch/arm/boot/dts/am5748.dtsi
 create mode 100644 arch/arm/boot/dts/dra7-l4-jacinto.dtsi
 copy arch/arm/boot/dts/{dra72x.dtsi => dra72x-common.dtsi} (96%)
 copy arch/arm/boot/dts/{dra74x.dtsi => dra74x-common.dtsi} (98%)
 copy arch/arm/boot/dts/{dra76x.dtsi => dra76x-common.dtsi} (98%)

diff --git a/arch/arm/boot/dts/am5718.dtsi b/arch/arm/boot/dts/am5718.dtsi
new file mode 100644
index 000000000000..b6e4db5c9f55
--- /dev/null
+++ b/arch/arm/boot/dts/am5718.dtsi
@@ -0,0 +1,5 @@
+#include "dra72x-common.dtsi"
+
+/ {
+	compatible = "ti,am5718", "ti,dra7";
+};
diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts
index 6432309b39e3..66116ad3f9f4 100644
--- a/arch/arm/boot/dts/am571x-idk.dts
+++ b/arch/arm/boot/dts/am571x-idk.dts
@@ -7,7 +7,7 @@
  */
 /dts-v1/;
 
-#include "dra72x.dtsi"
+#include "am5718.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "dra7-mmc-iodelay.dtsi"
diff --git a/arch/arm/boot/dts/am5728.dtsi b/arch/arm/boot/dts/am5728.dtsi
new file mode 100644
index 000000000000..7b1fcffd3103
--- /dev/null
+++ b/arch/arm/boot/dts/am5728.dtsi
@@ -0,0 +1,6 @@
+#include "dra74x-common.dtsi"
+
+
+/ {
+	compatible = "ti,am5728", "ti,dra7";
+};
diff --git a/arch/arm/boot/dts/am572x-idk.dts b/arch/arm/boot/dts/am572x-idk.dts
index b2fb6e097be7..4f835222c266 100644
--- a/arch/arm/boot/dts/am572x-idk.dts
+++ b/arch/arm/boot/dts/am572x-idk.dts
@@ -8,15 +8,14 @@
 
 /dts-v1/;
 
-#include "dra74x.dtsi"
+#include "am5728.dtsi"
 #include "dra7-mmc-iodelay.dtsi"
 #include "dra74x-mmc-iodelay.dtsi"
 #include "am572x-idk-common.dtsi"
 
 / {
 	model = "TI AM5728 IDK";
-	compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
-		     "ti,dra7";
+	compatible = "ti,am5728-idk", "ti,am5728", "ti,dra7";
 };
 
 &mmc1 {
diff --git a/arch/arm/boot/dts/am5748.dtsi b/arch/arm/boot/dts/am5748.dtsi
new file mode 100644
index 000000000000..4d809d60d24a
--- /dev/null
+++ b/arch/arm/boot/dts/am5748.dtsi
@@ -0,0 +1,5 @@
+#include "dra76x-common.dtsi"
+
+/ {
+	compatible = "ti,am5748", "ti,dra7";
+};
diff --git a/arch/arm/boot/dts/am574x-idk.dts b/arch/arm/boot/dts/am574x-idk.dts
index 378dfa780ac1..c61fbe1c22ae 100644
--- a/arch/arm/boot/dts/am574x-idk.dts
+++ b/arch/arm/boot/dts/am574x-idk.dts
@@ -6,14 +6,14 @@
 
 /dts-v1/;
 
-#include "dra76x.dtsi"
+#include "am5748.dtsi"
 #include "dra7-mmc-iodelay.dtsi"
 #include "dra76x-mmc-iodelay.dtsi"
 #include "am572x-idk-common.dtsi"
 
 / {
 	model = "TI AM5748 IDK";
-	compatible = "ti,am5728-idk", "ti,dra762", "ti,dra7";
+	compatible = "ti,am5748-idk", "ti,am5748", "ti,dra7";
 };
 
 &qspi {
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index 4748ce8747ad..0460de0da2bf 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -13,7 +13,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
-#include "dra74x.dtsi"
+#include "am5728.dtsi"
 
 / {
 	model = "CompuLab CL-SOM-AM57x";
diff --git a/arch/arm/boot/dts/dra7-l4-jacinto.dtsi b/arch/arm/boot/dts/dra7-l4-jacinto.dtsi
new file mode 100644
index 000000000000..d8376ec401f5
--- /dev/null
+++ b/arch/arm/boot/dts/dra7-l4-jacinto.dtsi
@@ -0,0 +1,73 @@
+&l4cfg_segment0 {
+	target-module@100000 {			/* 0x48900000, ap 85 04.0 */
+		compatible = "ti,sysc-omap4", "ti,sysc";
+		ti,hwmods = "usb_otg_ss3";
+		reg = <0x100000 0x4>,
+		      <0x100010 0x4>;
+		reg-names = "rev", "sysc";
+		ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
+		ti,sysc-midle = <SYSC_IDLE_FORCE>,
+				<SYSC_IDLE_NO>,
+				<SYSC_IDLE_SMART>,
+				<SYSC_IDLE_SMART_WKUP>;
+		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+				<SYSC_IDLE_NO>,
+				<SYSC_IDLE_SMART>,
+				<SYSC_IDLE_SMART_WKUP>;
+		/* Domains (P, C): l3init_pwrdm, l3init_clkdm */
+		clocks = <&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS3_CLKCTRL 0>;
+		clock-names = "fck";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x100000 0x20000>;
+
+		omap_dwc3_3: omap_dwc3_3@0 {
+			compatible = "ti,dwc3";
+			reg = <0x0 0x10000>;
+			interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			utmi-mode = <2>;
+			ranges = <0 0 0x20000>;
+			status = "disabled";
+
+			usb3: usb@10000 {
+				compatible = "snps,dwc3";
+				reg = <0x10000 0x17000>;
+				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "peripheral",
+						  "host",
+						  "otg";
+				maximum-speed = "high-speed";
+				dr_mode = "otg";
+				snps,dis_u3_susphy_quirk;
+				snps,dis_u2_susphy_quirk;
+			};
+		};
+	};
+
+	target-module@140000 {			/* 0x48940000, ap 75 3c.0 */
+		compatible = "ti,sysc-omap4", "ti,sysc";
+		ti,hwmods = "usb_otg_ss4";
+		reg = <0x140000 0x4>,
+		      <0x140010 0x4>;
+		reg-names = "rev", "sysc";
+		ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
+		ti,sysc-midle = <SYSC_IDLE_FORCE>,
+				<SYSC_IDLE_NO>,
+				<SYSC_IDLE_SMART>,
+				<SYSC_IDLE_SMART_WKUP>;
+		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+				<SYSC_IDLE_NO>,
+				<SYSC_IDLE_SMART>,
+				<SYSC_IDLE_SMART_WKUP>;
+		/* Domains (P, C): l3init_pwrdm, l3init_clkdm */
+		clocks = <&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS4_CLKCTRL 0>;
+		clock-names = "fck";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x140000 0x20000>;
+	};
+};
diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
index 414f1cd68733..733e31898e6a 100644
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -10,7 +10,7 @@
 		 <0x00100000 0x4a100000 0x100000>,	/* segment 1 */
 		 <0x00200000 0x4a200000 0x100000>;	/* segment 2 */
 
-	segment@0 {					/* 0x4a000000 */
+	l4cfg_segment0: segment@0 {					/* 0x4a000000 */
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -4099,78 +4099,6 @@
 			};
 		};
 
-		target-module@100000 {			/* 0x48900000, ap 85 04.0 */
-			compatible = "ti,sysc-omap4", "ti,sysc";
-			ti,hwmods = "usb_otg_ss3";
-			reg = <0x100000 0x4>,
-			      <0x100010 0x4>;
-			reg-names = "rev", "sysc";
-			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
-			ti,sysc-midle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>,
-					<SYSC_IDLE_SMART_WKUP>;
-			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>,
-					<SYSC_IDLE_SMART_WKUP>;
-			/* Domains (P, C): l3init_pwrdm, l3init_clkdm */
-			clocks = <&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS3_CLKCTRL 0>;
-			clock-names = "fck";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x0 0x100000 0x20000>;
-
-			omap_dwc3_3: omap_dwc3_3@0 {
-				compatible = "ti,dwc3";
-				reg = <0x0 0x10000>;
-				interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
-				#address-cells = <1>;
-				#size-cells = <1>;
-				utmi-mode = <2>;
-				ranges = <0 0 0x20000>;
-				status = "disabled";
-
-				usb3: usb@10000 {
-					compatible = "snps,dwc3";
-					reg = <0x10000 0x17000>;
-					interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
-						     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
-					interrupt-names = "peripheral",
-							  "host",
-							  "otg";
-					maximum-speed = "high-speed";
-					dr_mode = "otg";
-					snps,dis_u3_susphy_quirk;
-					snps,dis_u2_susphy_quirk;
-				};
-			};
-		};
-
-		target-module@140000 {			/* 0x48940000, ap 75 3c.0 */
-			compatible = "ti,sysc-omap4", "ti,sysc";
-			ti,hwmods = "usb_otg_ss4";
-			reg = <0x140000 0x4>,
-			      <0x140010 0x4>;
-			reg-names = "rev", "sysc";
-			ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
-			ti,sysc-midle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>,
-					<SYSC_IDLE_SMART_WKUP>;
-			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
-					<SYSC_IDLE_NO>,
-					<SYSC_IDLE_SMART>,
-					<SYSC_IDLE_SMART_WKUP>;
-			/* Domains (P, C): l3init_pwrdm, l3init_clkdm */
-			clocks = <&l3init_clkctrl DRA7_L3INIT_USB_OTG_SS4_CLKCTRL 0>;
-			clock-names = "fck";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x0 0x140000 0x20000>;
-		};
-
 		target-module@170000 {			/* 0x48970000, ap 21 0a.0 */
 			compatible = "ti,sysc";
 			status = "disabled";
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x-common.dtsi
similarity index 96%
copy from arch/arm/boot/dts/dra72x.dtsi
copy to arch/arm/boot/dts/dra72x-common.dtsi
index 89831552cd86..b3ca9733fe5f 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x-common.dtsi
@@ -10,8 +10,6 @@
 #include "dra7.dtsi"
 
 / {
-	compatible = "ti,dra722", "ti,dra72", "ti,dra7";
-
 	pmu {
 		compatible = "arm,cortex-a15-pmu";
 		interrupt-parent = <&wakeupgen>;
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index 89831552cd86..7a4a58da8dec 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -1,64 +1,6 @@
-/*
- * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- * Based on "omap4.dtsi"
- */
-
-#include "dra7.dtsi"
+#include "dra72x-common.dtsi"
+#include "dra7-l4-jacinto.dtsi"
 
 / {
 	compatible = "ti,dra722", "ti,dra72", "ti,dra7";
-
-	pmu {
-		compatible = "arm,cortex-a15-pmu";
-		interrupt-parent = <&wakeupgen>;
-		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-	};
-};
-
-&dss {
-	reg = <0x58000000 0x80>,
-	      <0x58004054 0x4>,
-	      <0x58004300 0x20>;
-	reg-names = "dss", "pll1_clkctrl", "pll1";
-
-	clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
-		 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>;
-	clock-names = "fck", "video1_clk";
-};
-
-&mailbox5 {
-	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
-		ti,mbox-tx = <6 2 2>;
-		ti,mbox-rx = <4 2 2>;
-		status = "disabled";
-	};
-	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
-		ti,mbox-tx = <5 2 2>;
-		ti,mbox-rx = <1 2 2>;
-		status = "disabled";
-	};
-};
-
-&mailbox6 {
-	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
-		ti,mbox-tx = <6 2 2>;
-		ti,mbox-rx = <4 2 2>;
-		status = "disabled";
-	};
-};
-
-&pcie1_rc {
-	compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
-};
-
-&pcie1_ep {
-	compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
-};
-
-&pcie2_rc {
-	compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
 };
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x-common.dtsi
similarity index 98%
copy from arch/arm/boot/dts/dra74x.dtsi
copy to arch/arm/boot/dts/dra74x-common.dtsi
index 8294a607fec8..401b4af65397 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x-common.dtsi
@@ -10,8 +10,6 @@
 #include "dra7.dtsi"
 
 / {
-	compatible = "ti,dra742", "ti,dra74", "ti,dra7";
-
 	cpus {
 		cpu@1 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 8294a607fec8..5c40bf894f44 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -1,148 +1,7 @@
-/*
- * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- * Based on "omap4.dtsi"
- */
+#include "dra74x-common.dtsi"
+#include "dra7-l4-jacinto.dtsi"
 
-#include "dra7.dtsi"
 
 / {
-	compatible = "ti,dra742", "ti,dra74", "ti,dra7";
-
-	cpus {
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a15";
-			reg = <1>;
-			operating-points-v2 = <&cpu0_opp_table>;
-
-			clocks = <&dpll_mpu_ck>;
-			clock-names = "cpu";
-
-			clock-latency = <300000>; /* From omap-cpufreq driver */
-
-			/* cooling options */
-			#cooling-cells = <2>; /* min followed by max */
-
-			vbb-supply = <&abb_mpu>;
-		};
-	};
-
-	pmu {
-		compatible = "arm,cortex-a15-pmu";
-		interrupt-parent = <&wakeupgen>;
-		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-	ocp {
-		dsp2_system: dsp_system@41500000 {
-			compatible = "syscon";
-			reg = <0x41500000 0x100>;
-		};
-
-		omap_dwc3_4: omap_dwc3_4@48940000 {
-			compatible = "ti,dwc3";
-			ti,hwmods = "usb_otg_ss4";
-			reg = <0x48940000 0x10000>;
-			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			utmi-mode = <2>;
-			ranges;
-			status = "disabled";
-			usb4: usb@48950000 {
-				compatible = "snps,dwc3";
-				reg = <0x48950000 0x17000>;
-				interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names = "peripheral",
-						  "host",
-						  "otg";
-				maximum-speed = "high-speed";
-				dr_mode = "otg";
-			};
-		};
-
-		mmu0_dsp2: mmu@41501000 {
-			compatible = "ti,dra7-dsp-iommu";
-			reg = <0x41501000 0x100>;
-			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
-			ti,hwmods = "mmu0_dsp2";
-			#iommu-cells = <0>;
-			ti,syscon-mmuconfig = <&dsp2_system 0x0>;
-			status = "disabled";
-		};
-
-		mmu1_dsp2: mmu@41502000 {
-			compatible = "ti,dra7-dsp-iommu";
-			reg = <0x41502000 0x100>;
-			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
-			ti,hwmods = "mmu1_dsp2";
-			#iommu-cells = <0>;
-			ti,syscon-mmuconfig = <&dsp2_system 0x1>;
-			status = "disabled";
-		};
-	};
-};
-
-&cpu0_opp_table {
-	opp-shared;
-};
-
-&dss {
-	reg = <0x58000000 0x80>,
-	      <0x58004054 0x4>,
-	      <0x58004300 0x20>,
-	      <0x58009054 0x4>,
-	      <0x58009300 0x20>;
-	reg-names = "dss", "pll1_clkctrl", "pll1",
-		    "pll2_clkctrl", "pll2";
-
-	clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
-		 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>,
-		 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 13>;
-	clock-names = "fck", "video1_clk", "video2_clk";
-};
-
-&mailbox5 {
-	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
-		ti,mbox-tx = <6 2 2>;
-		ti,mbox-rx = <4 2 2>;
-		status = "disabled";
-	};
-	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
-		ti,mbox-tx = <5 2 2>;
-		ti,mbox-rx = <1 2 2>;
-		status = "disabled";
-	};
-};
-
-&mailbox6 {
-	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
-		ti,mbox-tx = <6 2 2>;
-		ti,mbox-rx = <4 2 2>;
-		status = "disabled";
-	};
-	mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
-		ti,mbox-tx = <5 2 2>;
-		ti,mbox-rx = <1 2 2>;
-		status = "disabled";
-	};
-};
-
-&pcie1_rc {
-	compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
-};
-
-&pcie1_ep {
-	compatible = "ti,dra746-pcie-ep", "ti,dra7-pcie-ep";
-};
-
-&pcie2_rc {
-	compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
+        compatible = "ti,dra742", "ti,dra74", "ti,dra7";
 };
diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x-common.dtsi
similarity index 98%
copy from arch/arm/boot/dts/dra76x.dtsi
copy to arch/arm/boot/dts/dra76x-common.dtsi
index 9ee45aa365d8..caaf07f98d76 100644
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x-common.dtsi
@@ -9,8 +9,6 @@
 #include "dra74x.dtsi"
 
 / {
-	compatible = "ti,dra762", "ti,dra7";
-
 	ocp {
 		target-module@42c01900 {
 			compatible = "ti,sysc-dra7-mcan", "ti,sysc";
diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
index 9ee45aa365d8..7d77e30bc7f8 100644
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x.dtsi
@@ -1,83 +1,6 @@
-/*
- * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include "dra74x.dtsi"
+#include "dra76x-common.dtsi"
+#include "dra7-l4-jacinto.dtsi"
 
 / {
 	compatible = "ti,dra762", "ti,dra7";
-
-	ocp {
-		target-module@42c01900 {
-			compatible = "ti,sysc-dra7-mcan", "ti,sysc";
-			ranges = <0x0 0x42c00000 0x2000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x42c01900 0x4>,
-			      <0x42c01904 0x4>,
-			      <0x42c01908 0x4>;
-			reg-names = "rev", "sysc", "syss";
-			ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
-					 SYSC_DRA7_MCAN_ENAWAKEUP)>;
-			ti,syss-mask = <1>;
-			clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
-			clock-names = "fck";
-
-			m_can0: mcan@1a00 {
-				compatible = "bosch,m_can";
-				reg = <0x1a00 0x4000>, <0x0 0x18FC>;
-				reg-names = "m_can", "message_ram";
-				interrupt-parent = <&gic>;
-				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
-					     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
-				interrupt-names = "int0", "int1";
-				clocks = <&mcan_clk>, <&l3_iclk_div>;
-				clock-names = "cclk", "hclk";
-				bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
-			};
-		};
-	};
-
-};
-
-/* MCAN interrupts are hard-wired to irqs 67, 68 */
-&crossbar_mpu {
-	ti,irqs-skip = <10 67 68 133 139 140>;
-};
-
-&scm_conf_clocks {
-	dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc {
-		#clock-cells = <0>;
-		compatible = "ti,divider-clock";
-		clocks = <&dpll_gmac_x2_ck>;
-		ti,max-div = <63>;
-		reg = <0x03fc>;
-		ti,bit-shift=<20>;
-		ti,latch-bit=<26>;
-		assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>;
-		assigned-clock-rates = <80000000>;
-	};
-
-	dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc {
-		#clock-cells = <0>;
-		compatible = "ti,mux-clock";
-		clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>;
-		reg = <0x3fc>;
-		ti,bit-shift = <29>;
-		ti,latch-bit=<26>;
-		assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
-		assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>;
-	};
-
-	mcan_clk: mcan_clk@3fc {
-		#clock-cells = <0>;
-		compatible = "ti,gate-clock";
-		clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
-		ti,bit-shift = <27>;
-		reg = <0x3fc>;
-	};
 };
-- 
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Re: [RFC PATCH 1/4] ARM: dts: dra7: Keep usb_otg_ss3 and usb_otg_ss4 disabled

[Tony Lindgren]

* Roger Quadros <rogerq@ti.com> [190403 14:54]:
> Below patch is just to get initial feedback. Is the overall approach of splitting
> into DRA7 vs AM5 dtsi files OK?

Yes makes sense to me. And if the devices are on the interconnect but not
fully functional, we probably want to set the status = "disabled" only for
the child to idle the module on init. If the whole device is missing then
not adding it at all for certain SoC variants makes sense.

Regards,

Tony