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From: Mark Brown <broonie@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: Mark Brown <broonie@kernel.org>,
	thierry.reding@gmail.com, jonathanh@nvidia.com, talho@nvidia.com,
	skomatineni@nvidia.com, broonie@kernel.org, robh+dt@kernel.org,
	mark.rutland@arm.com, kyarlagadda@nvidia.com,
	ldewangan@nvidia.com, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-spi@vger.kernel.org
Subject: Applied "spi: document tx/rx clock delay properties" to the spi tree
Date: Mon,  8 Apr 2019 14:31:19 +0700 (+07)	[thread overview]
Message-ID: <20190408073119.3BF84441D3B@finisterre.ee.mobilebroadband> (raw)
In-Reply-To: <1554423259-26056-19-git-send-email-skomatineni@nvidia.com>

The patch

   spi: document tx/rx clock delay properties

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 7558f978f9b66a2bc284a0e8c0764b88305bc29f Mon Sep 17 00:00:00 2001
From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Thu, 4 Apr 2019 17:14:18 -0700
Subject: [PATCH] spi: document tx/rx clock delay properties

Tegra SPI controller has TX and RX trimmers to tuning the delay of
SPI master clock with respect to the data.

TX and RX tap values are based on the platform validation across the
PVT and the trimmer values vary based on the trace lengths to the
corresponding SPI devices.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 .../bindings/spi/nvidia,tegra114-spi.txt      | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 9ba7c5a273b4..db8e0d71c5bc 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -23,6 +23,18 @@ Required properties:
 Recommended properties:
 - spi-max-frequency: Definition as per
                      Documentation/devicetree/bindings/spi/spi-bus.txt
+Optional properties:
+- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device
+  with this tap value. This property is used to tune the outgoing data from
+  Tegra SPI master with respect to outgoing Tegra SPI master clock.
+  Tap values vary based on the platform design trace lengths from Tegra SPI
+  to corresponding slave devices. Valid tap values are from 0 thru 63.
+- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device
+  with this tap value. This property is used to adjust the Tegra SPI master
+  clock with respect to the data from the SPI slave device.
+  Tap values vary based on the platform design trace lengths from Tegra SPI
+  to corresponding slave devices. Valid tap values are from 0 thru 63.
+
 Example:
 
 spi@7000d600 {
@@ -38,4 +50,12 @@ spi@7000d600 {
 	reset-names = "spi";
 	dmas = <&apbdma 16>, <&apbdma 16>;
 	dma-names = "rx", "tx";
+	<spi-client>@<bus_num> {
+		...
+		...
+		nvidia,rx-clk-tap-delay = <0>;
+		nvidia,tx-clk-tap-delay = <16>;
+		...
+	};
+
 };
-- 
2.20.1


  parent reply	other threads:[~2019-04-08  7:31 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-05  0:14 [PATCH V2 01/20] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 02/20] spi: tegra114: use unpacked mode for below 4 bytes Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 03/20] spi: tegra114: de-assert CS before SPI mode change Sowjanya Komatineni
2019-04-05  3:27   ` Applied "spi: tegra114: de-assert CS before SPI mode change" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 04/20] spi: tegra114: avoid reset call in atomic context Sowjanya Komatineni
2019-04-05  3:26   ` Applied "spi: tegra114: avoid reset call in atomic context" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 05/20] spi: tegra114: dump SPI registers during timeout Sowjanya Komatineni
2019-04-05  3:26   ` Applied "spi: tegra114: dump SPI registers during timeout" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 06/20] spi: tegra114: set supported bits per word Sowjanya Komatineni
2019-04-05  3:26   ` Applied "spi: tegra114: set supported bits per word" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 07/20] spi: tegra114: set bus number based on id Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 08/20] spi: tegra114: add dual mode support Sowjanya Komatineni
2019-04-08  7:32   ` Applied "spi: tegra114: add dual mode support" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 09/20] spi: tegra114: add 3 wire transfer mode support Sowjanya Komatineni
2019-04-08  7:31   ` Applied "spi: tegra114: add 3 wire transfer mode support" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 10/20] Documentation: devicetree: spi: add spi-lsbyte-first propery Sowjanya Komatineni
2019-04-08  6:27   ` Mark Brown
2019-04-05  0:14 ` [PATCH V2 11/20] spi: expand mode support and add LSBYTE_FIRST mode Sowjanya Komatineni
2019-04-08  6:28   ` Mark Brown
2019-04-11 19:58     ` Sowjanya Komatineni
2019-04-12  8:32       ` Mark Brown
2019-04-05  0:14 ` [PATCH V2 12/20] spi: tegra114: add support for LSBYTE_FIRST Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 13/20] spi: tegra114: add support for interrupt mask Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 14/20] spi: tegra114: add support for gpio based cs Sowjanya Komatineni
2019-04-08  6:30   ` Mark Brown
2019-04-05  0:14 ` [PATCH V2 15/20] spi: tegra114: add support for hw " Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 16/20] spi-summary: document set_cs_timing Sowjanya Komatineni
2019-04-08  7:31   ` Applied "spi-summary: document set_cs_timing" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 17/20] spi: add a method for configuring CS timing Sowjanya Komatineni
2019-04-08  7:31   ` Applied "spi: add a method for configuring CS timing" to the spi tree Mark Brown
2019-04-05  0:14 ` [PATCH V2 18/20] spi: tegra114: add support for HW CS timing Sowjanya Komatineni
2019-04-05  0:14 ` [PATCH V2 19/20] DT bindings: spi: document tx/rx clock delay properties Sowjanya Komatineni
2019-04-08  7:22   ` Mark Brown
2019-04-08  7:31   ` Mark Brown [this message]
2019-04-05  0:14 ` [PATCH V2 20/20] spi: tegra114: add support for tuning TX and RX trimmers Sowjanya Komatineni

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