* [PATCH 0/3] Add Avenger96 board support
@ 2019-05-03 5:31 Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 1/3] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Manivannan Sadhasivam
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-03 5:31 UTC (permalink / raw)
To: mcoquelin.stm32, alexandre.torgue, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel,
loic.pallardy, Manivannan Sadhasivam
Hello,
This patchset adds Avenger96 board support. This board is one of the
Consumer Edition boards of the 96Boards family from Arrow Electronics
featuring STM32MP157A MPU and has the following features:
SoC: STM32MP157AAC
PMIC: STPMIC1A
RAM: 1024 Mbyte @ 533MHz
Storage: eMMC v4.51: 8 Gbyte
microSD Socket: UHS-1 v3.01
Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
LED: 4x User LED, 1x WiFi LED, 1x BT LED
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Thanks,
Mani
Manivannan Sadhasivam (3):
dt-bindings: arm: stm32: Document Avenger96 devicetree binding
ARM: dts: stm32mp157: Add missing pinctrl definitions
ARM: dts: Add Avenger96 devicetree support based on STM32MP157A
.../devicetree/bindings/arm/stm32/stm32.txt | 6 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 62 ++++
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 320 ++++++++++++++++++
4 files changed, 389 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts
--
2.17.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] dt-bindings: arm: stm32: Document Avenger96 devicetree binding
2019-05-03 5:31 [PATCH 0/3] Add Avenger96 board support Manivannan Sadhasivam
@ 2019-05-03 5:31 ` Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Manivannan Sadhasivam
2 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-03 5:31 UTC (permalink / raw)
To: mcoquelin.stm32, alexandre.torgue, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel,
loic.pallardy, Manivannan Sadhasivam
Document devicetree binding for Avenger96 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/arm/stm32/stm32.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.txt b/Documentation/devicetree/bindings/arm/stm32/stm32.txt
index 6808ed9ddfd5..eba363a4b514 100644
--- a/Documentation/devicetree/bindings/arm/stm32/stm32.txt
+++ b/Documentation/devicetree/bindings/arm/stm32/stm32.txt
@@ -8,3 +8,9 @@ using one of the following compatible strings:
st,stm32f746
st,stm32h743
st,stm32mp157
+
+Boards:
+
+Root node property compatible must contain one of below depending on board:
+
+ - Avenger96: "arrow,stm32mp157a-avenger96"
--
2.17.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions
2019-05-03 5:31 [PATCH 0/3] Add Avenger96 board support Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 1/3] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Manivannan Sadhasivam
@ 2019-05-03 5:31 ` Manivannan Sadhasivam
2019-05-03 7:13 ` Alexandre Torgue
2019-05-03 5:31 ` [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Manivannan Sadhasivam
2 siblings, 1 reply; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-03 5:31 UTC (permalink / raw)
To: mcoquelin.stm32, alexandre.torgue, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel,
loic.pallardy, Manivannan Sadhasivam
Add missing pinctrl definitions for STM32MP157 MPU.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 62 +++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 85c417d9983b..0b5bcf6a7c97 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -241,6 +241,23 @@
};
};
+ i2c1_pins_b: i2c1-2 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
+ <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c1_pins_sleep_b: i2c1-3 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
+ <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
+ };
+ };
+
i2c2_pins_a: i2c2-0 {
pins {
pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
@@ -258,6 +275,23 @@
};
};
+ i2c2_pins_b: i2c2-2 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 0, AF3)>, /* I2C2_SCL */
+ <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c2_pins_sleep_b: i2c2-3 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* I2C2_SCL */
+ <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
+ };
+ };
+
i2c5_pins_a: i2c5-0 {
pins {
pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
@@ -599,6 +633,34 @@
bias-disable;
};
};
+
+ uart4_pins_b: uart4-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart7_pins_a: uart7-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
+ <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
+ <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
+ bias-disable;
+ };
+ };
};
pinctrl_z: pin-controller-z@54004000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A
2019-05-03 5:31 [PATCH 0/3] Add Avenger96 board support Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 1/3] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions Manivannan Sadhasivam
@ 2019-05-03 5:31 ` Manivannan Sadhasivam
2019-05-03 9:01 ` Alexandre Torgue
2 siblings, 1 reply; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-03 5:31 UTC (permalink / raw)
To: mcoquelin.stm32, alexandre.torgue, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel,
loic.pallardy, Manivannan Sadhasivam
Add devicetree support for Avenger96 board based on STM32MP157A MPU
from ST Micro. This board is one of the 96Boards Consumer Edition board
from Arrow Electronics and has the following features:
SoC: STM32MP157AAC
PMIC: STPMIC1A
RAM: 1024 Mbyte @ 533MHz
Storage: eMMC v4.51: 8 Gbyte
microSD Socket: UHS-1 v3.01
Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
LED: 4x User LED, 1x WiFi LED, 1x BT LED
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 320 ++++++++++++++++++++
2 files changed, 321 insertions(+)
create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8a1d0b3f55dd..f1d2f0bfa7c2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -965,6 +965,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp157a-dk1.dtb \
+ stm32mp157a-avenger96.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
new file mode 100644
index 000000000000..a3b8af82ac70
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -0,0 +1,320 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+/dts-v1/;
+
+#include "stm32mp157c.dtsi"
+#include "stm32mp157-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+ model = "Arrow Electronics STM32MP157A Avenger96 board";
+ compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
+
+ aliases {
+ ethernet0 = ðernet0;
+ mmc0 = &sdmmc1;
+ serial0 = &uart4;
+ serial1 = &uart7;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@c0000000 {
+ reg = <0xc0000000 0x40000000>;
+ };
+
+ led {
+ compatible = "gpio-leds";
+ led1 {
+ label = "green:user1";
+ gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led2 {
+ label = "green:user2";
+ gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "green:user3";
+ gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "green:user3";
+ gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ panic-indicator;
+ };
+
+ led5 {
+ label = "yellow:wifi";
+ gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ led6 {
+ label = "blue:bt";
+ gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "bluetooth-power";
+ default-state = "off";
+ };
+ };
+};
+
+ðernet0 {
+ status = "okay";
+ pinctrl-0 = <ðernet0_rgmii_pins_a>;
+ pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rgmii";
+ max-speed = <1000>;
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@7 {
+ reg = <7>;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_b>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins_a>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ pmic: stpmic@33 {
+ compatible = "st,stpmic1";
+ reg = <0x33>;
+ interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+
+ st,main-control-register = <0x04>;
+ st,vin-control-register = <0xc0>;
+ st,usb-control-register = <0x30>;
+
+ regulators {
+ compatible = "st,stpmic1-regulators";
+
+ ldo1-supply = <&v3v3>;
+ ldo2-supply = <&v3v3>;
+ ldo3-supply = <&vdd_ddr>;
+ ldo5-supply = <&v3v3>;
+ ldo6-supply = <&v3v3>;
+ pwr_sw1-supply = <&bst_out>;
+ pwr_sw2-supply = <&bst_out>;
+
+ vddcore: buck1 {
+ regulator-name = "vddcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd_ddr: buck2 {
+ regulator-name = "vdd_ddr";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd: buck3 {
+ regulator-name = "vdd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ st,mask_reset;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ v3v3: buck4 {
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ regulator-initial-mode = <0>;
+ };
+
+ vdda: ldo1 {
+ regulator-name = "vdda";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO1 0>;
+ interrupt-parent = <&pmic>;
+ };
+
+ v2v8: ldo2 {
+ regulator-name = "v2v8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ interrupts = <IT_CURLIM_LDO2 0>;
+ interrupt-parent = <&pmic>;
+ };
+
+ vtt_ddr: ldo3 {
+ regulator-name = "vtt_ddr";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <750000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ vdd_usb: ldo4 {
+ regulator-name = "vdd_usb";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ interrupts = <IT_CURLIM_LDO4 0>;
+ interrupt-parent = <&pmic>;
+ };
+
+ vdd_sd: ldo5 {
+ regulator-name = "vdd_sd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO5 0>;
+ interrupt-parent = <&pmic>;
+ regulator-boot-on;
+ };
+
+ v1v8: ldo6 {
+ regulator-name = "v1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ interrupts = <IT_CURLIM_LDO6 0>;
+ interrupt-parent = <&pmic>;
+ regulator-enable-ramp-delay = <300000>;
+ };
+
+ vref_ddr: vref_ddr {
+ regulator-name = "vref_ddr";
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ bst_out: boost {
+ regulator-name = "bst_out";
+ interrupts = <IT_OCP_BOOST 0>;
+ interrupt-parent = <&pmic>;
+ };
+
+ vbus_otg: pwr_sw1 {
+ regulator-name = "vbus_otg";
+ interrupts = <IT_OCP_OTG 0>;
+ interrupt-parent = <&pmic>;
+ regulator-active-discharge;
+ };
+
+ vbus_sw: pwr_sw2 {
+ regulator-name = "vbus_sw";
+ interrupts = <IT_OCP_SWOUT 0>;
+ interrupt-parent = <&pmic>;
+ regulator-active-discharge;
+ };
+ };
+
+ onkey {
+ compatible = "st,stpmic1-onkey";
+ interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
+ interrupt-names = "onkey-falling", "onkey-rising";
+ status = "okay";
+ };
+
+ watchdog {
+ compatible = "st,stpmic1-wdt";
+ status = "disabled";
+ };
+ };
+};
+
+&iwdg2 {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&rng1 {
+ status = "okay";
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sdmmc1 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
+ broken-cd;
+ st,sig-dir;
+ st,neg-edge;
+ st,use-ckin;
+ bus-width = <4>;
+ vmmc-supply = <&vdd_sd>;
+ status = "okay";
+};
+
+&uart4 {
+ /* On Low speed expansion header */
+ label = "LS-UART1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_b>;
+ status = "okay";
+};
+
+&uart7 {
+ /* On Low speed expansion header */
+ label = "LS-UART0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pins_a>;
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions
2019-05-03 5:31 ` [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions Manivannan Sadhasivam
@ 2019-05-03 7:13 ` Alexandre Torgue
2019-05-06 9:59 ` Manivannan Sadhasivam
0 siblings, 1 reply; 8+ messages in thread
From: Alexandre Torgue @ 2019-05-03 7:13 UTC (permalink / raw)
To: Manivannan Sadhasivam, mcoquelin.stm32, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel, loic.pallardy
Hi Mani
On 5/3/19 7:31 AM, Manivannan Sadhasivam wrote:
> Add missing pinctrl definitions for STM32MP157 MPU.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 62 +++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> index 85c417d9983b..0b5bcf6a7c97 100644
> --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> @@ -241,6 +241,23 @@
> };
> };
>
> + i2c1_pins_b: i2c1-2 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
> + <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
> + bias-disable;
> + drive-open-drain;
> + slew-rate = <0>;
> + };
> + };
> +
> + i2c1_pins_sleep_b: i2c1-3 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
> + <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
> + };
> + };
> +
> i2c2_pins_a: i2c2-0 {
> pins {
> pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
> @@ -258,6 +275,23 @@
> };
> };
>
> + i2c2_pins_b: i2c2-2 {
> + pins {
> + pinmux = <STM32_PINMUX('Z', 0, AF3)>, /* I2C2_SCL */
> + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
You can't do that. <STM32_PINMUX('Z', 0, AF3)> has to be declared in
pincontroller-z. So in your case, you have to define 2 groups for i2C2
for your default state (the same for the sleep state).
regards
Alex
> + bias-disable;
> + drive-open-drain;
> + slew-rate = <0>;
> + };
> + };
> +
> + i2c2_pins_sleep_b: i2c2-3 {
> + pins {
> + pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* I2C2_SCL */
> + <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
> + };
> + };
> +
> i2c5_pins_a: i2c5-0 {
> pins {
> pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
> @@ -599,6 +633,34 @@
> bias-disable;
> };
> };
> +
> + uart4_pins_b: uart4-1 {
> + pins1 {
> + pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
> + bias-disable;
> + };
> + };
> +
> + uart7_pins_a: uart7-0 {
> + pins1 {
> + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins2 {
> + pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
> + <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
> + <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
> + bias-disable;
> + };
> + };
> };
>
> pinctrl_z: pin-controller-z@54004000 {
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A
2019-05-03 5:31 ` [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Manivannan Sadhasivam
@ 2019-05-03 9:01 ` Alexandre Torgue
2019-05-06 10:00 ` Manivannan Sadhasivam
0 siblings, 1 reply; 8+ messages in thread
From: Alexandre Torgue @ 2019-05-03 9:01 UTC (permalink / raw)
To: Manivannan Sadhasivam, mcoquelin.stm32, robh+dt
Cc: linux-stm32, linux-arm-kernel, devicetree, linux-kernel, loic.pallardy
Hi Mani
On 5/3/19 7:31 AM, Manivannan Sadhasivam wrote:
> Add devicetree support for Avenger96 board based on STM32MP157A MPU
> from ST Micro. This board is one of the 96Boards Consumer Edition board
> from Arrow Electronics and has the following features:
>
> SoC: STM32MP157AAC
> PMIC: STPMIC1A
> RAM: 1024 Mbyte @ 533MHz
> Storage: eMMC v4.51: 8 Gbyte
> microSD Socket: UHS-1 v3.01
> Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
> Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
> Bluetooth®v4.2 (BR/EDR/BLE)
> USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
> Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
> LED: 4x User LED, 1x WiFi LED, 1x BT LED
>
> More information about this board can be found in 96Boards website:
> https://www.96boards.org/product/avenger96/
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/stm32mp157a-avenger96.dts | 320 ++++++++++++++++++++
> 2 files changed, 321 insertions(+)
> create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8a1d0b3f55dd..f1d2f0bfa7c2 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -965,6 +965,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
> stm32h743i-eval.dtb \
> stm32h743i-disco.dtb \
> stm32mp157a-dk1.dtb \
> + stm32mp157a-avenger96.dtb \
follow alphabetic order please.
> stm32mp157c-dk2.dtb \
> stm32mp157c-ed1.dtb \
> stm32mp157c-ev1.dtb
> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> new file mode 100644
> index 000000000000..a3b8af82ac70
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> @@ -0,0 +1,320 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157c.dtsi"
> +#include "stm32mp157-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/st,stpmic1.h>
> +
> +/ {
> + model = "Arrow Electronics STM32MP157A Avenger96 board";
> + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + mmc0 = &sdmmc1;
> + serial0 = &uart4;
> + serial1 = &uart7;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@c0000000 {
> + reg = <0xc0000000 0x40000000>;
you could add device_type = "memory";
> + };
> +
> + led {
> + compatible = "gpio-leds";
> + led1 {
> + label = "green:user1";
> + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + led2 {
> + label = "green:user2";
> + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };
> +
> + led3 {
> + label = "green:user3";
> + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc1";
> + default-state = "off";
> + };
> +
> + led4 {
> + label = "green:user3";
> + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "none";
> + default-state = "off";
> + panic-indicator;
> + };
> +
> + led5 {
> + label = "yellow:wifi";
> + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "phy0tx";
> + default-state = "off";
> + };
> +
> + led6 {
> + label = "blue:bt";
> + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "bluetooth-power";
> + default-state = "off";
> + };
> + };
> +};
> +
> +ðernet0 {
> + status = "okay";
> + pinctrl-0 = <ðernet0_rgmii_pins_a>;
> + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
> + pinctrl-names = "default", "sleep";
> + phy-mode = "rgmii";
> + max-speed = <1000>;
> + phy-handle = <&phy0>;
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + phy0: ethernet-phy@7 {
> + reg = <7>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins_b>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_b>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + pmic: stpmic@33 {
> + compatible = "st,stpmic1";
> + reg = <0x33>;
> + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + status = "okay";
> +
> + st,main-control-register = <0x04>;
> + st,vin-control-register = <0xc0>;
> + st,usb-control-register = <0x30>;
> +
> + regulators {
> + compatible = "st,stpmic1-regulators";
> +
> + ldo1-supply = <&v3v3>;
> + ldo2-supply = <&v3v3>;
> + ldo3-supply = <&vdd_ddr>;
> + ldo5-supply = <&v3v3>;
> + ldo6-supply = <&v3v3>;
> + pwr_sw1-supply = <&bst_out>;
> + pwr_sw2-supply = <&bst_out>;
> +
> + vddcore: buck1 {
> + regulator-name = "vddcore";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd_ddr: buck2 {
> + regulator-name = "vdd_ddr";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd: buck3 {
> + regulator-name = "vdd";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + st,mask_reset;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + v3v3: buck4 {
> + regulator-name = "v3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + regulator-initial-mode = <0>;
> + };
> +
> + vdda: ldo1 {
> + regulator-name = "vdda";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO1 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + v2v8: ldo2 {
> + regulator-name = "v2v8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + interrupts = <IT_CURLIM_LDO2 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vtt_ddr: ldo3 {
> + regulator-name = "vtt_ddr";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <750000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + vdd_usb: ldo4 {
> + regulator-name = "vdd_usb";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + interrupts = <IT_CURLIM_LDO4 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vdd_sd: ldo5 {
> + regulator-name = "vdd_sd";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO5 0>;
> + interrupt-parent = <&pmic>;
> + regulator-boot-on;
> + };
> +
> + v1v8: ldo6 {
> + regulator-name = "v1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + interrupts = <IT_CURLIM_LDO6 0>;
> + interrupt-parent = <&pmic>;
> + regulator-enable-ramp-delay = <300000>;
> + };
> +
> + vref_ddr: vref_ddr {
> + regulator-name = "vref_ddr";
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + bst_out: boost {
> + regulator-name = "bst_out";
> + interrupts = <IT_OCP_BOOST 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vbus_otg: pwr_sw1 {
> + regulator-name = "vbus_otg";
> + interrupts = <IT_OCP_OTG 0>;
> + interrupt-parent = <&pmic>;
> + regulator-active-discharge;
> + };
> +
> + vbus_sw: pwr_sw2 {
> + regulator-name = "vbus_sw";
> + interrupts = <IT_OCP_SWOUT 0>;
> + interrupt-parent = <&pmic>;
> + regulator-active-discharge;
> + };
> + };
> +
> + onkey {
> + compatible = "st,stpmic1-onkey";
> + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> + interrupt-names = "onkey-falling", "onkey-rising";
> + status = "okay";
> + };
> +
> + watchdog {
> + compatible = "st,stpmic1-wdt";
> + status = "disabled";
> + };
> + };
> +};
> +
> +&iwdg2 {
> + timeout-sec = <32>;
> + status = "okay";
> +};
> +
> +&rng1 {
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&sdmmc1 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
> + pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
> + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
> + broken-cd;
> + st,sig-dir;
> + st,neg-edge;
> + st,use-ckin;
> + bus-width = <4>;
> + vmmc-supply = <&vdd_sd>;
> + status = "okay";
> +};
> +
> +&uart4 {
> + /* On Low speed expansion header */
> + label = "LS-UART1";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins_b>;
> + status = "okay";
> +};
> +
> +&uart7 {
> + /* On Low speed expansion header */
> + label = "LS-UART0";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart7_pins_a>;
> + status = "okay";
> +};
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions
2019-05-03 7:13 ` Alexandre Torgue
@ 2019-05-06 9:59 ` Manivannan Sadhasivam
0 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-06 9:59 UTC (permalink / raw)
To: Alexandre Torgue
Cc: mcoquelin.stm32, robh+dt, linux-stm32, linux-arm-kernel,
devicetree, linux-kernel, loic.pallardy
Hi Alex,
On Fri, May 03, 2019 at 09:13:27AM +0200, Alexandre Torgue wrote:
> Hi Mani
>
> On 5/3/19 7:31 AM, Manivannan Sadhasivam wrote:
> > Add missing pinctrl definitions for STM32MP157 MPU.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> > arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 62 +++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> > index 85c417d9983b..0b5bcf6a7c97 100644
> > --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> > +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
> > @@ -241,6 +241,23 @@
> > };
> > };
> > + i2c1_pins_b: i2c1-2 {
> > + pins {
> > + pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
> > + <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
> > + bias-disable;
> > + drive-open-drain;
> > + slew-rate = <0>;
> > + };
> > + };
> > +
> > + i2c1_pins_sleep_b: i2c1-3 {
> > + pins {
> > + pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
> > + <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
> > + };
> > + };
> > +
> > i2c2_pins_a: i2c2-0 {
> > pins {
> > pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
> > @@ -258,6 +275,23 @@
> > };
> > };
> > + i2c2_pins_b: i2c2-2 {
> > + pins {
> > + pinmux = <STM32_PINMUX('Z', 0, AF3)>, /* I2C2_SCL */
> > + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
>
> You can't do that. <STM32_PINMUX('Z', 0, AF3)> has to be declared in
> pincontroller-z. So in your case, you have to define 2 groups for i2C2 for
> your default state (the same for the sleep state).
>
Ah, yes I failed to note pincontroller z. Will fix it in next revision!
Thanks,
Mani
> regards
> Alex
>
>
>
>
> > + bias-disable;
> > + drive-open-drain;
> > + slew-rate = <0>;
> > + };
> > + };
> > +
> > + i2c2_pins_sleep_b: i2c2-3 {
> > + pins {
> > + pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* I2C2_SCL */
> > + <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
> > + };
> > + };
> > +
> > i2c5_pins_a: i2c5-0 {
> > pins {
> > pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
> > @@ -599,6 +633,34 @@
> > bias-disable;
> > };
> > };
> > +
> > + uart4_pins_b: uart4-1 {
> > + pins1 {
> > + pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
> > + bias-disable;
> > + drive-push-pull;
> > + slew-rate = <0>;
> > + };
> > + pins2 {
> > + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
> > + bias-disable;
> > + };
> > + };
> > +
> > + uart7_pins_a: uart7-0 {
> > + pins1 {
> > + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
> > + bias-disable;
> > + drive-push-pull;
> > + slew-rate = <0>;
> > + };
> > + pins2 {
> > + pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
> > + <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
> > + <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
> > + bias-disable;
> > + };
> > + };
> > };
> > pinctrl_z: pin-controller-z@54004000 {
> >
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A
2019-05-03 9:01 ` Alexandre Torgue
@ 2019-05-06 10:00 ` Manivannan Sadhasivam
0 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-06 10:00 UTC (permalink / raw)
To: Alexandre Torgue
Cc: mcoquelin.stm32, robh+dt, linux-stm32, linux-arm-kernel,
devicetree, linux-kernel, loic.pallardy
Hi Alex,
On Fri, May 03, 2019 at 11:01:00AM +0200, Alexandre Torgue wrote:
> Hi Mani
>
> On 5/3/19 7:31 AM, Manivannan Sadhasivam wrote:
> > Add devicetree support for Avenger96 board based on STM32MP157A MPU
> > from ST Micro. This board is one of the 96Boards Consumer Edition board
> > from Arrow Electronics and has the following features:
> >
> > SoC: STM32MP157AAC
> > PMIC: STPMIC1A
> > RAM: 1024 Mbyte @ 533MHz
> > Storage: eMMC v4.51: 8 Gbyte
> > microSD Socket: UHS-1 v3.01
> > Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
> > Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
> > Bluetooth®v4.2 (BR/EDR/BLE)
> > USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
> > Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
> > LED: 4x User LED, 1x WiFi LED, 1x BT LED
> >
> > More information about this board can be found in 96Boards website:
> > https://www.96boards.org/product/avenger96/
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/stm32mp157a-avenger96.dts | 320 ++++++++++++++++++++
> > 2 files changed, 321 insertions(+)
> > create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 8a1d0b3f55dd..f1d2f0bfa7c2 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -965,6 +965,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
> > stm32h743i-eval.dtb \
> > stm32h743i-disco.dtb \
> > stm32mp157a-dk1.dtb \
> > + stm32mp157a-avenger96.dtb \
>
> follow alphabetic order please.
>
Ack
> > stm32mp157c-dk2.dtb \
> > stm32mp157c-ed1.dtb \
> > stm32mp157c-ev1.dtb
> > diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> > new file mode 100644
> > index 000000000000..a3b8af82ac70
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> > @@ -0,0 +1,320 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> > +/*
> > + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> > + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "stm32mp157c.dtsi"
> > +#include "stm32mp157-pinctrl.dtsi"
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/mfd/st,stpmic1.h>
> > +
> > +/ {
> > + model = "Arrow Electronics STM32MP157A Avenger96 board";
> > + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
> > +
> > + aliases {
> > + ethernet0 = ðernet0;
> > + mmc0 = &sdmmc1;
> > + serial0 = &uart4;
> > + serial1 = &uart7;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + memory@c0000000 {
> > + reg = <0xc0000000 0x40000000>;
>
> you could add device_type = "memory";
>
Ack.
Thanks,
Mani
> > + };
> > +
> > + led {
> > + compatible = "gpio-leds";
> > + led1 {
> > + label = "green:user1";
> > + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "heartbeat";
> > + default-state = "off";
> > + };
> > +
> > + led2 {
> > + label = "green:user2";
> > + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "mmc0";
> > + default-state = "off";
> > + };
> > +
> > + led3 {
> > + label = "green:user3";
> > + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "mmc1";
> > + default-state = "off";
> > + };
> > +
> > + led4 {
> > + label = "green:user3";
> > + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "none";
> > + default-state = "off";
> > + panic-indicator;
> > + };
> > +
> > + led5 {
> > + label = "yellow:wifi";
> > + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "phy0tx";
> > + default-state = "off";
> > + };
> > +
> > + led6 {
> > + label = "blue:bt";
> > + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "bluetooth-power";
> > + default-state = "off";
> > + };
> > + };
> > +};
> > +
> > +ðernet0 {
> > + status = "okay";
> > + pinctrl-0 = <ðernet0_rgmii_pins_a>;
> > + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
> > + pinctrl-names = "default", "sleep";
> > + phy-mode = "rgmii";
> > + max-speed = <1000>;
> > + phy-handle = <&phy0>;
> > +
> > + mdio0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "snps,dwmac-mdio";
> > + phy0: ethernet-phy@7 {
> > + reg = <7>;
> > + };
> > + };
> > +};
> > +
> > +&i2c1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c1_pins_b>;
> > + i2c-scl-rising-time-ns = <185>;
> > + i2c-scl-falling-time-ns = <20>;
> > + status = "okay";
> > + /delete-property/dmas;
> > + /delete-property/dma-names;
> > +};
> > +
> > +&i2c2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c2_pins_b>;
> > + i2c-scl-rising-time-ns = <185>;
> > + i2c-scl-falling-time-ns = <20>;
> > + status = "okay";
> > + /delete-property/dmas;
> > + /delete-property/dma-names;
> > +};
> > +
> > +&i2c4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c4_pins_a>;
> > + i2c-scl-rising-time-ns = <185>;
> > + i2c-scl-falling-time-ns = <20>;
> > + status = "okay";
> > + /delete-property/dmas;
> > + /delete-property/dma-names;
> > +
> > + pmic: stpmic@33 {
> > + compatible = "st,stpmic1";
> > + reg = <0x33>;
> > + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
> > + interrupt-controller;
> > + #interrupt-cells = <2>;
> > + status = "okay";
> > +
> > + st,main-control-register = <0x04>;
> > + st,vin-control-register = <0xc0>;
> > + st,usb-control-register = <0x30>;
> > +
> > + regulators {
> > + compatible = "st,stpmic1-regulators";
> > +
> > + ldo1-supply = <&v3v3>;
> > + ldo2-supply = <&v3v3>;
> > + ldo3-supply = <&vdd_ddr>;
> > + ldo5-supply = <&v3v3>;
> > + ldo6-supply = <&v3v3>;
> > + pwr_sw1-supply = <&bst_out>;
> > + pwr_sw2-supply = <&bst_out>;
> > +
> > + vddcore: buck1 {
> > + regulator-name = "vddcore";
> > + regulator-min-microvolt = <1200000>;
> > + regulator-max-microvolt = <1350000>;
> > + regulator-always-on;
> > + regulator-initial-mode = <0>;
> > + regulator-over-current-protection;
> > + };
> > +
> > + vdd_ddr: buck2 {
> > + regulator-name = "vdd_ddr";
> > + regulator-min-microvolt = <1350000>;
> > + regulator-max-microvolt = <1350000>;
> > + regulator-always-on;
> > + regulator-initial-mode = <0>;
> > + regulator-over-current-protection;
> > + };
> > +
> > + vdd: buck3 {
> > + regulator-name = "vdd";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + st,mask_reset;
> > + regulator-initial-mode = <0>;
> > + regulator-over-current-protection;
> > + };
> > +
> > + v3v3: buck4 {
> > + regulator-name = "v3v3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + regulator-over-current-protection;
> > + regulator-initial-mode = <0>;
> > + };
> > +
> > + vdda: ldo1 {
> > + regulator-name = "vdda";
> > + regulator-min-microvolt = <2900000>;
> > + regulator-max-microvolt = <2900000>;
> > + interrupts = <IT_CURLIM_LDO1 0>;
> > + interrupt-parent = <&pmic>;
> > + };
> > +
> > + v2v8: ldo2 {
> > + regulator-name = "v2v8";
> > + regulator-min-microvolt = <2800000>;
> > + regulator-max-microvolt = <2800000>;
> > + interrupts = <IT_CURLIM_LDO2 0>;
> > + interrupt-parent = <&pmic>;
> > + };
> > +
> > + vtt_ddr: ldo3 {
> > + regulator-name = "vtt_ddr";
> > + regulator-min-microvolt = <500000>;
> > + regulator-max-microvolt = <750000>;
> > + regulator-always-on;
> > + regulator-over-current-protection;
> > + };
> > +
> > + vdd_usb: ldo4 {
> > + regulator-name = "vdd_usb";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + interrupts = <IT_CURLIM_LDO4 0>;
> > + interrupt-parent = <&pmic>;
> > + };
> > +
> > + vdd_sd: ldo5 {
> > + regulator-name = "vdd_sd";
> > + regulator-min-microvolt = <2900000>;
> > + regulator-max-microvolt = <2900000>;
> > + interrupts = <IT_CURLIM_LDO5 0>;
> > + interrupt-parent = <&pmic>;
> > + regulator-boot-on;
> > + };
> > +
> > + v1v8: ldo6 {
> > + regulator-name = "v1v8";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + interrupts = <IT_CURLIM_LDO6 0>;
> > + interrupt-parent = <&pmic>;
> > + regulator-enable-ramp-delay = <300000>;
> > + };
> > +
> > + vref_ddr: vref_ddr {
> > + regulator-name = "vref_ddr";
> > + regulator-always-on;
> > + regulator-over-current-protection;
> > + };
> > +
> > + bst_out: boost {
> > + regulator-name = "bst_out";
> > + interrupts = <IT_OCP_BOOST 0>;
> > + interrupt-parent = <&pmic>;
> > + };
> > +
> > + vbus_otg: pwr_sw1 {
> > + regulator-name = "vbus_otg";
> > + interrupts = <IT_OCP_OTG 0>;
> > + interrupt-parent = <&pmic>;
> > + regulator-active-discharge;
> > + };
> > +
> > + vbus_sw: pwr_sw2 {
> > + regulator-name = "vbus_sw";
> > + interrupts = <IT_OCP_SWOUT 0>;
> > + interrupt-parent = <&pmic>;
> > + regulator-active-discharge;
> > + };
> > + };
> > +
> > + onkey {
> > + compatible = "st,stpmic1-onkey";
> > + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> > + interrupt-names = "onkey-falling", "onkey-rising";
> > + status = "okay";
> > + };
> > +
> > + watchdog {
> > + compatible = "st,stpmic1-wdt";
> > + status = "disabled";
> > + };
> > + };
> > +};
> > +
> > +&iwdg2 {
> > + timeout-sec = <32>;
> > + status = "okay";
> > +};
> > +
> > +&rng1 {
> > + status = "okay";
> > +};
> > +
> > +&rtc {
> > + status = "okay";
> > +};
> > +
> > +&sdmmc1 {
> > + pinctrl-names = "default", "opendrain", "sleep";
> > + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
> > + pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
> > + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
> > + broken-cd;
> > + st,sig-dir;
> > + st,neg-edge;
> > + st,use-ckin;
> > + bus-width = <4>;
> > + vmmc-supply = <&vdd_sd>;
> > + status = "okay";
> > +};
> > +
> > +&uart4 {
> > + /* On Low speed expansion header */
> > + label = "LS-UART1";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart4_pins_b>;
> > + status = "okay";
> > +};
> > +
> > +&uart7 {
> > + /* On Low speed expansion header */
> > + label = "LS-UART0";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart7_pins_a>;
> > + status = "okay";
> > +};
> >
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-05-06 10:00 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-03 5:31 [PATCH 0/3] Add Avenger96 board support Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 1/3] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 2/3] ARM: dts: stm32mp157: Add missing pinctrl definitions Manivannan Sadhasivam
2019-05-03 7:13 ` Alexandre Torgue
2019-05-06 9:59 ` Manivannan Sadhasivam
2019-05-03 5:31 ` [PATCH 3/3] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Manivannan Sadhasivam
2019-05-03 9:01 ` Alexandre Torgue
2019-05-06 10:00 ` Manivannan Sadhasivam
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