* [PATCH v2 1/4] dt-bindings: reset: Add devicetree binding for BM1880 reset controller
2019-05-08 16:53 [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
@ 2019-05-08 16:53 ` Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 2/4] arm64: dts: bitmain: Add reset controller support for BM1880 SoC Manivannan Sadhasivam
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-08 16:53 UTC (permalink / raw)
To: p.zabel, robh+dt
Cc: linux-kernel, devicetree, haitao.suo, darren.tsao, Manivannan Sadhasivam
Add devicetree binding for Bitmain BM1880 SoC reset controller. This SoC
has two reset controllers each controlling reset lines of different
peripherals.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/reset/bitmain,bm1880-reset.txt | 18 +++
.../dt-bindings/reset/bitmain,bm1880-reset.h | 106 ++++++++++++++++++
2 files changed, 124 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
create mode 100644 include/dt-bindings/reset/bitmain,bm1880-reset.h
diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
new file mode 100644
index 000000000000..0674ae904b19
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
@@ -0,0 +1,18 @@
+Bitmain BM1880 SoC Reset Controller
+===================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be "bitmain,bm1880-reset"
+- reg: Offset and length of reset controller space in SCTRL.
+- #reset-cells: Must be 1.
+
+Example:
+
+ reset: reset-controller@800 {
+ compatible = "bitmain,bm1880-reset";
+ reg = <0x800 0x8>;
+ #reset-cells = <1>;
+ };
diff --git a/include/dt-bindings/reset/bitmain,bm1880-reset.h b/include/dt-bindings/reset/bitmain,bm1880-reset.h
new file mode 100644
index 000000000000..e8103ce6f4d6
--- /dev/null
+++ b/include/dt-bindings/reset/bitmain,bm1880-reset.h
@@ -0,0 +1,106 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2018 Bitmain Ltd.
+ * Copyright (c) 2019 Linaro Ltd.
+ */
+
+#ifndef _DT_BINDINGS_BM1880_RESET_H
+#define _DT_BINDINGS_BM1880_RESET_H
+
+#define BM1880_RST_MAIN_AP 0
+#define BM1880_RST_SECOND_AP 1
+#define BM1880_RST_DDR 2
+#define BM1880_RST_VIDEO 3
+#define BM1880_RST_JPEG 4
+#define BM1880_RST_VPP 5
+#define BM1880_RST_GDMA 6
+#define BM1880_RST_AXI_SRAM 7
+#define BM1880_RST_TPU 8
+#define BM1880_RST_USB 9
+#define BM1880_RST_ETH0 10
+#define BM1880_RST_ETH1 11
+#define BM1880_RST_NAND 12
+#define BM1880_RST_EMMC 13
+#define BM1880_RST_SD 14
+#define BM1880_RST_SDMA 15
+#define BM1880_RST_I2S0 16
+#define BM1880_RST_I2S1 17
+#define BM1880_RST_UART0_1_CLK 18
+#define BM1880_RST_UART0_1_ACLK 19
+#define BM1880_RST_UART2_3_CLK 20
+#define BM1880_RST_UART2_3_ACLK 21
+#define BM1880_RST_MINER 22
+#define BM1880_RST_I2C0 23
+#define BM1880_RST_I2C1 24
+#define BM1880_RST_I2C2 25
+#define BM1880_RST_I2C3 26
+#define BM1880_RST_I2C4 27
+#define BM1880_RST_PWM0 28
+#define BM1880_RST_PWM1 29
+#define BM1880_RST_PWM2 30
+#define BM1880_RST_PWM3 31
+#define BM1880_RST_SPI 32
+#define BM1880_RST_GPIO0 33
+#define BM1880_RST_GPIO1 34
+#define BM1880_RST_GPIO2 35
+#define BM1880_RST_EFUSE 36
+#define BM1880_RST_WDT 37
+#define BM1880_RST_AHB_ROM 38
+#define BM1880_RST_SPIC 39
+
+#define BM1880_CLK_RST_A53 0
+#define BM1880_CLK_RST_50M_A53 1
+#define BM1880_CLK_RST_AHB_ROM 2
+#define BM1880_CLK_RST_AXI_SRAM 3
+#define BM1880_CLK_RST_DDR_AXI 4
+#define BM1880_CLK_RST_EFUSE 5
+#define BM1880_CLK_RST_APB_EFUSE 6
+#define BM1880_CLK_RST_AXI_EMMC 7
+#define BM1880_CLK_RST_EMMC 8
+#define BM1880_CLK_RST_100K_EMMC 9
+#define BM1880_CLK_RST_AXI_SD 10
+#define BM1880_CLK_RST_SD 11
+#define BM1880_CLK_RST_100K_SD 12
+#define BM1880_CLK_RST_500M_ETH0 13
+#define BM1880_CLK_RST_AXI_ETH0 14
+#define BM1880_CLK_RST_500M_ETH1 15
+#define BM1880_CLK_RST_AXI_ETH1 16
+#define BM1880_CLK_RST_AXI_GDMA 17
+#define BM1880_CLK_RST_APB_GPIO 18
+#define BM1880_CLK_RST_APB_GPIO_INTR 19
+#define BM1880_CLK_RST_GPIO_DB 20
+#define BM1880_CLK_RST_AXI_MINER 21
+#define BM1880_CLK_RST_AHB_SF 22
+#define BM1880_CLK_RST_SDMA_AXI 23
+#define BM1880_CLK_RST_SDMA_AUD 24
+#define BM1880_CLK_RST_APB_I2C 25
+#define BM1880_CLK_RST_APB_WDT 26
+#define BM1880_CLK_RST_APB_JPEG 27
+#define BM1880_CLK_RST_JPEG_AXI 28
+#define BM1880_CLK_RST_AXI_NF 29
+#define BM1880_CLK_RST_APB_NF 30
+#define BM1880_CLK_RST_NF 31
+#define BM1880_CLK_RST_APB_PWM 32
+#define BM1880_CLK_RST_RV 33
+#define BM1880_CLK_RST_APB_SPI 34
+#define BM1880_CLK_RST_TPU_AXI 35
+#define BM1880_CLK_RST_UART_500M 36
+#define BM1880_CLK_RST_APB_UART 37
+#define BM1880_CLK_RST_APB_I2S 38
+#define BM1880_CLK_RST_AXI_USB 39
+#define BM1880_CLK_RST_APB_USB 40
+#define BM1880_CLK_RST_125M_USB 41
+#define BM1880_CLK_RST_33K_USB 42
+#define BM1880_CLK_RST_12M_USB 43
+#define BM1880_CLK_RST_APB_VIDEO 44
+#define BM1880_CLK_RST_VIDEO_AXI 45
+#define BM1880_CLK_RST_VPP_AXI 46
+#define BM1880_CLK_RST_APB_VPP 47
+#define BM1880_CLK_RST_AXI1 48
+#define BM1880_CLK_RST_AXI2 49
+#define BM1880_CLK_RST_AXI3 50
+#define BM1880_CLK_RST_AXI4 51
+#define BM1880_CLK_RST_AXI5 52
+#define BM1880_CLK_RST_AXI6 53
+
+#endif /* _DT_BINDINGS_BM1880_RESET_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/4] arm64: dts: bitmain: Add reset controller support for BM1880 SoC
2019-05-08 16:53 [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 1/4] dt-bindings: reset: Add devicetree binding for BM1880 reset controller Manivannan Sadhasivam
@ 2019-05-08 16:53 ` Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 3/4] reset: " Manivannan Sadhasivam
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-08 16:53 UTC (permalink / raw)
To: p.zabel, robh+dt
Cc: linux-kernel, devicetree, haitao.suo, darren.tsao, Manivannan Sadhasivam
Add reset controller support for Bitmain BM1880 SoC. This SoC has two
reset controllers, each controlling reset lines of different peripherals.
This commit also adds reset support to UART peripherals.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
arch/arm64/boot/dts/bitmain/bm1880.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index fdfdc65d29ef..37ecb760a2d2 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/bitmain,bm1880-reset.h>
/ {
compatible = "bitmain,bm1880";
@@ -92,6 +93,18 @@
compatible = "bitmain,bm1880-pinctrl";
reg = <0x50 0x4B0>;
};
+
+ clk_rst: reset-controller@800 {
+ compatible = "bitmain,bm1880-reset";
+ reg = <0x800 0x8>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller@C00 {
+ compatible = "bitmain,bm1880-reset";
+ reg = <0xC00 0x8>;
+ #reset-cells = <1>;
+ };
};
uart0: serial@58018000 {
@@ -100,6 +113,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART0_1_CLK>;
status = "disabled";
};
@@ -109,6 +123,7 @@
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART0_1_ACLK>;
status = "disabled";
};
@@ -118,6 +133,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART2_3_CLK>;
status = "disabled";
};
@@ -127,6 +143,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART2_3_ACLK>;
status = "disabled";
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 3/4] reset: Add reset controller support for BM1880 SoC
2019-05-08 16:53 [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 1/4] dt-bindings: reset: Add devicetree binding for BM1880 reset controller Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 2/4] arm64: dts: bitmain: Add reset controller support for BM1880 SoC Manivannan Sadhasivam
@ 2019-05-08 16:53 ` Manivannan Sadhasivam
2019-05-08 16:53 ` [PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple Manivannan Sadhasivam
2019-05-10 8:57 ` [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
4 siblings, 0 replies; 7+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-08 16:53 UTC (permalink / raw)
To: p.zabel, robh+dt
Cc: linux-kernel, devicetree, haitao.suo, darren.tsao, Manivannan Sadhasivam
Add reset controller support for Bitmain BM1880 SoC reusing the
reset-simple driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/reset/Kconfig | 3 ++-
drivers/reset/reset-simple.c | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 2c8c23db92fb..b25e8d139f0d 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -117,7 +117,7 @@ config RESET_QCOM_PDC
config RESET_SIMPLE
bool "Simple Reset Controller Driver" if COMPILE_TEST
- default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
+ default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN
help
This enables a simple reset controller driver for reset lines that
that can be asserted and deasserted by toggling bits in a contiguous,
@@ -129,6 +129,7 @@ config RESET_SIMPLE
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- ZTE's zx2967 family
+ - Bitmain BM1880 SoC
config RESET_STM32MP157
bool "STM32MP157 Reset Driver" if COMPILE_TEST
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 77fbba3100c8..5e8c86470e6b 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -129,6 +129,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
.data = &reset_simple_active_low },
{ .compatible = "aspeed,ast2400-lpc-reset" },
{ .compatible = "aspeed,ast2500-lpc-reset" },
+ { .compatible = "bitmain,bm1880-reset",
+ .data = &reset_simple_active_low },
{ /* sentinel */ },
};
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple
2019-05-08 16:53 [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
` (2 preceding siblings ...)
2019-05-08 16:53 ` [PATCH v2 3/4] reset: " Manivannan Sadhasivam
@ 2019-05-08 16:53 ` Manivannan Sadhasivam
2019-05-09 6:24 ` Maxime Ripard
2019-05-10 8:57 ` [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
4 siblings, 1 reply; 7+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-08 16:53 UTC (permalink / raw)
To: p.zabel, robh+dt
Cc: linux-kernel, devicetree, haitao.suo, darren.tsao,
Manivannan Sadhasivam, Maxime Ripard
Switch to SPDX license identifier for reset-simple driver.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/reset/reset-simple.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 5e8c86470e6b..8043ba48a30a 100644
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Simple Reset Controller Driver
*
@@ -8,11 +9,6 @@
* Copyright 2013 Maxime Ripard
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <linux/device.h>
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple
2019-05-08 16:53 ` [PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple Manivannan Sadhasivam
@ 2019-05-09 6:24 ` Maxime Ripard
0 siblings, 0 replies; 7+ messages in thread
From: Maxime Ripard @ 2019-05-09 6:24 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: p.zabel, robh+dt, linux-kernel, devicetree, haitao.suo, darren.tsao
[-- Attachment #1: Type: text/plain, Size: 417 bytes --]
On Wed, May 08, 2019 at 10:23:19PM +0530, Manivannan Sadhasivam wrote:
> Switch to SPDX license identifier for reset-simple driver.
>
> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/4] Add reset controller support for BM1880 SoC
2019-05-08 16:53 [PATCH v2 0/4] Add reset controller support for BM1880 SoC Manivannan Sadhasivam
` (3 preceding siblings ...)
2019-05-08 16:53 ` [PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple Manivannan Sadhasivam
@ 2019-05-10 8:57 ` Manivannan Sadhasivam
4 siblings, 0 replies; 7+ messages in thread
From: Manivannan Sadhasivam @ 2019-05-10 8:57 UTC (permalink / raw)
To: p.zabel, robh+dt; +Cc: linux-kernel, devicetree, haitao.suo, darren.tsao
On Wed, May 08, 2019 at 10:23:15PM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds reset controller support for Bitmain BM1880 SoC.
> BM1880 SoC has two reset controllers each controlling reset lines of
> different peripherals. And the reset-simple driver has been reused here.
>
Sorry, above information was wrong! Actually there is only one reset
controller in this SoC. The other one (clk_rst) is a set of registers used
for clock gating functionality (clarified by Bitmain Engineer), so I will
remove it in next version.
Thanks,
Mani
> This patchset has been tested on 96Boards Sophon Edge board.
>
> Thanks,
> Mani
>
> Changes in v2:
>
> As per review from Philipp:
>
> * Reused reset_simple_active_low struct instead of a new one for bm1880
> * Splitted the SPDX license change to a separate commit
> * Added Reviewed-by tags from Rob and Philipp
>
> Manivannan Sadhasivam (4):
> dt-bindings: reset: Add devicetree binding for BM1880 reset controller
> arm64: dts: bitmain: Add reset controller support for BM1880 SoC
> reset: Add reset controller support for BM1880 SoC
> reset: Switch to SPDX license identifier for reset-simple
>
> .../bindings/reset/bitmain,bm1880-reset.txt | 18 +++
> arch/arm64/boot/dts/bitmain/bm1880.dtsi | 17 +++
> drivers/reset/Kconfig | 3 +-
> drivers/reset/reset-simple.c | 8 +-
> .../dt-bindings/reset/bitmain,bm1880-reset.h | 106 ++++++++++++++++++
> 5 files changed, 146 insertions(+), 6 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
> create mode 100644 include/dt-bindings/reset/bitmain,bm1880-reset.h
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread