From: Wen He <wen.he_1@nxp.com>
To: "dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"liviu.dudau@arm.com" <liviu.dudau@arm.com>
Cc: Leo Li <leoyang.li@nxp.com>, Wen He <wen.he_1@nxp.com>
Subject: [v1] drm/arm/mali-dp: Disable checking for required pixel clock rate
Date: Wed, 15 May 2019 02:42:08 +0000 [thread overview]
Message-ID: <20190515024348.43642-1-wen.he_1@nxp.com> (raw)
Disable checking for required pixel clock rate if ARCH_LAYERSCPAE
is enable.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
---
change in description:
- This check that only supported one pixel clock required clock rate
compare with dts node value. but we have supports 4 pixel clock
for ls1028a board.
drivers/gpu/drm/arm/malidp_crtc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c
index 56aad288666e..bb79223d9981 100644
--- a/drivers/gpu/drm/arm/malidp_crtc.c
+++ b/drivers/gpu/drm/arm/malidp_crtc.c
@@ -36,11 +36,13 @@ static enum drm_mode_status malidp_crtc_mode_valid(struct drm_crtc *crtc,
if (req_rate) {
rate = clk_round_rate(hwdev->pxlclk, req_rate);
+#ifndef CONFIG_ARCH_LAYERSCAPE
if (rate != req_rate) {
DRM_DEBUG_DRIVER("pxlclk doesn't support %ld Hz\n",
req_rate);
return MODE_NOCLOCK;
}
+#endif
}
return MODE_OK;
--
2.17.1
next reply other threads:[~2019-05-15 2:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-15 2:42 Wen He [this message]
2019-05-15 15:45 ` [v1] drm/arm/mali-dp: Disable checking for required pixel clock rate liviu.dudau
2019-05-16 8:10 ` [EXT] " Wen He
2019-05-16 8:23 ` liviu.dudau
2019-05-17 10:38 ` Wen He
2019-05-17 16:17 ` liviu.dudau
2019-05-15 17:14 ` Robin Murphy
2019-05-16 9:42 ` [EXT] " Wen He
2019-05-16 10:45 ` Robin Murphy
2019-05-17 10:37 ` Wen He
2019-05-17 16:13 ` liviu.dudau
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