From: Herbert Xu <herbert@gondor.apana.org.au>
To: Horia Geanta <horia.geanta@nxp.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Eric Biggers <ebiggers@kernel.org>,
Iuliana Prodan <iuliana.prodan@nxp.com>,
"David S. Miller" <davem@davemloft.net>,
Sascha Hauer <s.hauer@pengutronix.de>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH] crypto: gcm - fix cacheline sharing
Date: Fri, 31 May 2019 14:14:04 +0800 [thread overview]
Message-ID: <20190531061403.3lzvddt3r2mrn2g2@gondor.apana.org.au> (raw)
In-Reply-To: <VI1PR0402MB348582411F826968EBC59A8B98190@VI1PR0402MB3485.eurprd04.prod.outlook.com>
On Fri, May 31, 2019 at 06:10:51AM +0000, Horia Geanta wrote:
>
> Driver is not touching the DMA mapped areas, the DMA API conventions are
> carefully followed.
> It's touching a virtual pointer that is not DMA mapped, that just happens to be
> on the same cache line with a DMA mapped buffer.
Well you can't control what the users give you so you must assume
that the virtual address always share a cacheline with the DMA
buffer.
That's why you must only operate on that virtual address either
before you DMA map or after you DMA unmap. Virtual addresses
that you allocate yourself (including ones on the stack) are
obviously not subject to this restriction.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
prev parent reply other threads:[~2019-05-31 6:14 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 17:10 [PATCH] crypto: gcm - fix cacheline sharing Iuliana Prodan
2019-05-29 20:27 ` Eric Biggers
2019-05-29 22:16 ` Ard Biesheuvel
2019-05-30 13:29 ` Iuliana Prodan
2019-05-30 13:34 ` Herbert Xu
2019-05-30 13:45 ` Iuliana Prodan
2019-05-30 13:53 ` Ard Biesheuvel
2019-05-30 13:55 ` Ard Biesheuvel
2019-05-30 14:27 ` Herbert Xu
2019-05-30 14:28 ` Ard Biesheuvel
2019-05-30 14:31 ` Ard Biesheuvel
2019-05-30 14:34 ` Herbert Xu
2019-05-30 15:04 ` Ard Biesheuvel
2019-05-30 15:06 ` Herbert Xu
2019-05-30 15:10 ` Ard Biesheuvel
2019-05-30 15:13 ` Herbert Xu
2019-05-30 15:17 ` Ard Biesheuvel
2019-05-30 22:00 ` Iuliana Prodan
2019-05-31 5:54 ` Horia Geanta
2019-05-30 14:53 ` Pascal Van Leeuwen
2019-05-30 15:13 ` Ard Biesheuvel
2019-06-06 6:37 ` Herbert Xu
2019-06-06 6:42 ` Ard Biesheuvel
2019-06-06 6:46 ` Herbert Xu
2019-06-06 6:53 ` Ard Biesheuvel
2019-06-06 6:57 ` Herbert Xu
2019-06-06 7:10 ` Horia Geanta
2019-06-06 7:15 ` Herbert Xu
2019-06-06 8:36 ` Horia Geanta
2019-06-06 9:33 ` Herbert Xu
2019-05-30 13:58 ` Herbert Xu
2019-05-30 14:11 ` Ard Biesheuvel
2019-05-30 14:29 ` Pascal Van Leeuwen
2019-05-30 5:34 ` Herbert Xu
2019-05-30 7:46 ` Horia Geanta
2019-05-30 8:08 ` Ard Biesheuvel
2019-05-30 13:18 ` Horia Geanta
2019-05-30 13:25 ` Ard Biesheuvel
2019-05-31 6:05 ` Horia Geanta
2019-05-30 13:26 ` Herbert Xu
2019-05-31 5:22 ` Horia Geanta
2019-05-31 5:42 ` Herbert Xu
2019-05-31 6:10 ` Horia Geanta
2019-05-31 6:14 ` Herbert Xu [this message]
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