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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Eric Biggers <ebiggers@kernel.org>
Cc: Iuliana Prodan <iuliana.prodan@nxp.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Horia Geanta <horia.geanta@nxp.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"open list:HARDWARE RANDOM NUMBER GENERATOR CORE" 
	<linux-crypto@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH] crypto: gcm - fix cacheline sharing
Date: Thu, 30 May 2019 00:16:16 +0200	[thread overview]
Message-ID: <CAKv+Gu-4KqcY=WhwY98JigTzeXaL5ggYEcu7+kNzNtpO2FLQXg@mail.gmail.com> (raw)
In-Reply-To: <20190529202728.GA35103@gmail.com>

On Wed, 29 May 2019 at 22:27, Eric Biggers <ebiggers@kernel.org> wrote:
>
> On Wed, May 29, 2019 at 08:10:56PM +0300, Iuliana Prodan wrote:
> > The generic GCM driver should ensure that whatever it passes into
> > scatterlists is safe for non-cache coherent DMA.
> > The issue was seen while running GCM on CAAM driver. But, since CAAM
> > does not support GHASH on i.MX6, only CTR skcipher part of the GCM is
> > offloaded.
> > The skcipher request received by CAAM has req->src pointing to
> > auth_tag[16] and req->iv pointing to iv[16]. Problem is that when
> > the iv is updated (crypto API requires skcipher implementations to
> > update the IV with the last ciphertext block) is written in iv[16],
> > which is on the same cacheline as auth_tag[16] that was previously
> > DMA mapped.
> > Solution is to use a pointer, aligned to cache line, instead of auth_tag
> > buffer, for encryption/decryption and then free it on completion.
> >
> > Link: https://lore.kernel.org/linux-crypto/20190208114459.5nixe76xmmkhur75@gondor.apana.org.au/
> > Cc: <stable@vger.kernel.org> # v4.19+
> > Fixes: adcbc688fe2f ("crypto: gcm - Convert to new AEAD interface")
> > Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
> >
...
> So what about the other places that also pass an IV located next to the data,
> like crypto/ccm.c and crypto/adiantum.c?  If we're actually going to make this a
> new API requirement, then we need to add a debugging option that makes the API
> detect this violation so that the other places can be fixed too.
>
> Also, doing a kmalloc() per requset is inefficient and very error-prone.  In
> fact there are at least 3 bugs here: (1) not checking the return value, (2)
> incorrectly using GFP_KERNEL when it may be atomic context, and (3) not always
> freeing the memory.  Why not use cacheline-aligned memory within the request
> context, so that a separate kmalloc() isn't needed?
>
> Also, did you consider whether there's any way to make the crypto API handle
> this automatically, so that all the individual users don't have to?
>

Reading back that old thread, it appears that the core issue is that
the IV is copied when the scatterlist is already mapped for DMA. This
means the cacheline covering the IV and the auth tag is dirty while
the non-coherent DMA transaction takes place, and given that we clean
rather than invalidate the start and end of DMA mappings if they are
not aligned to the cache writeback granule size, whatever sits in the
cacheline overwrites whatever the device wrote in there.

Iuliana, did you try pulling the IV copy forward? I.e.,

diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index c0ece44f303b..11e91c0c9a96 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -1835,11 +1835,6 @@ static int skcipher_decrypt(struct skcipher_request *req)
        u32 *desc;
        int ret = 0;

-       /* allocate extended descriptor */
-       edesc = skcipher_edesc_alloc(req, DESC_JOB_IO_LEN * CAAM_CMD_SZ);
-       if (IS_ERR(edesc))
-               return PTR_ERR(edesc);
-
        /*
         * The crypto API expects us to set the IV (req->iv) to the last
         * ciphertext block.
@@ -1848,6 +1843,11 @@ static int skcipher_decrypt(struct skcipher_request *req)
                scatterwalk_map_and_copy(req->iv, req->src, req->cryptlen -
                                         ivsize, ivsize, 0);

+       /* allocate extended descriptor */
+       edesc = skcipher_edesc_alloc(req, DESC_JOB_IO_LEN * CAAM_CMD_SZ);
+       if (IS_ERR(edesc))
+               return PTR_ERR(edesc);
+
        /* Create and submit job descriptor*/
        init_skcipher_job(req, edesc, false);
        desc = edesc->hw_desc;

This should ensure that the cacheline is cleaned when the DMA mapping
is created.

  reply	other threads:[~2019-05-29 22:16 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-29 17:10 [PATCH] crypto: gcm - fix cacheline sharing Iuliana Prodan
2019-05-29 20:27 ` Eric Biggers
2019-05-29 22:16   ` Ard Biesheuvel [this message]
2019-05-30 13:29     ` Iuliana Prodan
2019-05-30 13:34       ` Herbert Xu
2019-05-30 13:45         ` Iuliana Prodan
2019-05-30 13:53           ` Ard Biesheuvel
2019-05-30 13:55             ` Ard Biesheuvel
2019-05-30 14:27               ` Herbert Xu
2019-05-30 14:28                 ` Ard Biesheuvel
2019-05-30 14:31                   ` Ard Biesheuvel
2019-05-30 14:34                     ` Herbert Xu
2019-05-30 15:04                       ` Ard Biesheuvel
2019-05-30 15:06                         ` Herbert Xu
2019-05-30 15:10                           ` Ard Biesheuvel
2019-05-30 15:13                             ` Herbert Xu
2019-05-30 15:17                               ` Ard Biesheuvel
2019-05-30 22:00                         ` Iuliana Prodan
2019-05-31  5:54                           ` Horia Geanta
2019-05-30 14:53                     ` Pascal Van Leeuwen
2019-05-30 15:13                       ` Ard Biesheuvel
2019-06-06  6:37                     ` Herbert Xu
2019-06-06  6:42                       ` Ard Biesheuvel
2019-06-06  6:46                         ` Herbert Xu
2019-06-06  6:53                           ` Ard Biesheuvel
2019-06-06  6:57                             ` Herbert Xu
2019-06-06  7:10                               ` Horia Geanta
2019-06-06  7:15                                 ` Herbert Xu
2019-06-06  8:36                                   ` Horia Geanta
2019-06-06  9:33                                     ` Herbert Xu
2019-05-30 13:58           ` Herbert Xu
2019-05-30 14:11             ` Ard Biesheuvel
2019-05-30 14:29               ` Pascal Van Leeuwen
2019-05-30  5:34   ` Herbert Xu
2019-05-30  7:46     ` Horia Geanta
2019-05-30  8:08       ` Ard Biesheuvel
2019-05-30 13:18         ` Horia Geanta
2019-05-30 13:25           ` Ard Biesheuvel
2019-05-31  6:05             ` Horia Geanta
2019-05-30 13:26           ` Herbert Xu
2019-05-31  5:22             ` Horia Geanta
2019-05-31  5:42               ` Herbert Xu
2019-05-31  6:10                 ` Horia Geanta
2019-05-31  6:14                   ` Herbert Xu

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