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From: Marc Zyngier <maz@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/9] irqchip/gic-v3: Add support for GICv3.1 extended PPI/SPI ranges
Date: Tue, 23 Jul 2019 11:44:28 +0100	[thread overview]
Message-ID: <20190723104437.154403-1-maz@kernel.org> (raw)

Apparently, having ~1000 wired interrupts is not enough, and some
people need more. Fear not! The GIC Achitecture Department hereby
grants you another 1024 SPIs, together with 64 PPIs, provided that you
implement GICv3.1 (see [1] for the details)

This series implements the required support, which requires a bit of
infrastructure rework in order to make the thing less horrible...

This has been tested on a FastModel.

[1] https://developer.arm.com/docs/ihi0069/latest (version E)

Marc Zyngier (9):
  irqchip/gic: Rework gic_configure_irq to take the full ICFGR base
  irqchip/gic-v3: Add INTID range and convertion primitives
  dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range
    support
  irqchip/gic-v3: Add ESPI range support
  irqchip/gic: Prepare for more than 16 PPIs
  irqchip/gic-v3: Dynamically allocate PPI NMI refcounts
  irqchip/gic-v3: Dynamically allocate PPI partition descriptors
  dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range
    support
  irqchip/gic-v3: Add EPPI range support

 .../interrupt-controller/arm,gic-v3.yaml      |   6 +-
 drivers/irqchip/irq-gic-common.c              |  33 +-
 drivers/irqchip/irq-gic-common.h              |   2 +-
 drivers/irqchip/irq-gic-v3.c                  | 323 ++++++++++++++----
 drivers/irqchip/irq-gic.c                     |  12 +-
 drivers/irqchip/irq-hip04.c                   |   9 +-
 include/linux/irqchip/arm-gic-v3.h            |  29 +-
 7 files changed, 319 insertions(+), 95 deletions(-)

-- 
2.20.1


             reply	other threads:[~2019-07-23 10:44 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-23 10:44 Marc Zyngier [this message]
2019-07-23 10:44 ` [PATCH 1/9] irqchip/gic: Rework gic_configure_irq to take the full ICFGR base Marc Zyngier
2019-07-23 10:44 ` [PATCH 2/9] irqchip/gic-v3: Add INTID range and convertion primitives Marc Zyngier
2019-07-23 10:44 ` [PATCH 3/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support Marc Zyngier
2019-07-23 12:59   ` [PATCH 3/9] dt-bindings: interrupt-controller: arm, gic-v3: " Lokesh Vutla
2019-07-23 13:15     ` Marc Zyngier
2019-07-23 13:35       ` Lokesh Vutla
2019-07-23 10:44 ` [PATCH 4/9] irqchip/gic-v3: Add " Marc Zyngier
2019-07-23 12:50   ` Lokesh Vutla
2019-07-23 13:04     ` Marc Zyngier
2019-07-23 10:44 ` [PATCH 5/9] irqchip/gic: Prepare for more than 16 PPIs Marc Zyngier
2019-07-23 10:44 ` [PATCH 6/9] irqchip/gic-v3: Dynamically allocate PPI NMI refcounts Marc Zyngier
2019-07-23 10:44 ` [PATCH 7/9] irqchip/gic-v3: Dynamically allocate PPI partition descriptors Marc Zyngier
2019-07-23 10:44 ` [PATCH 8/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support Marc Zyngier
2019-07-23 10:44 ` [PATCH 9/9] irqchip/gic-v3: Add " Marc Zyngier

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