* [PATCH] drm: add cache support for arm64
@ 2019-07-30 22:58 Rob Clark
2019-07-30 23:59 ` Rob Clark
0 siblings, 1 reply; 2+ messages in thread
From: Rob Clark @ 2019-07-30 22:58 UTC (permalink / raw)
To: dri-devel
Cc: Rob Clark, Maarten Lankhorst, Maxime Ripard, Sean Paul,
David Airlie, Daniel Vetter, linux-kernel
From: Rob Clark <robdclark@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
---
Not sure about 32b arm, but at least for aarch64 this is relatively
easy. So lets at least enable for arm64.
drivers/gpu/drm/drm_cache.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 3bd76e918b5d..90105c637797 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -69,6 +69,14 @@ static void drm_cache_flush_clflush(struct page *pages[],
}
#endif
+#if defined(__powerpc__)
+static void __flush_dcache_area(void *addr, size_t len)
+{
+ flush_dcache_range((unsigned long)addr,
+ (unsigned long)addr + PAGE_SIZE);
+}
+#endif
+
/**
* drm_clflush_pages - Flush dcache lines of a set of pages.
* @pages: List of pages to be flushed.
@@ -90,7 +98,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
if (wbinvd_on_all_cpus())
pr_err("Timed out waiting for cache flush\n");
-#elif defined(__powerpc__)
+#elif defined(__powerpc__) || defined(CONFIG_ARM64)
unsigned long i;
for (i = 0; i < num_pages; i++) {
struct page *page = pages[i];
@@ -100,8 +108,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
continue;
page_virtual = kmap_atomic(page);
- flush_dcache_range((unsigned long)page_virtual,
- (unsigned long)page_virtual + PAGE_SIZE);
+ __flush_dcache_area(page_virtual, PAGE_SIZE);
kunmap_atomic(page_virtual);
}
#else
@@ -135,6 +142,13 @@ drm_clflush_sg(struct sg_table *st)
if (wbinvd_on_all_cpus())
pr_err("Timed out waiting for cache flush\n");
+#elif defined(CONFIG_ARM64)
+ struct sg_page_iter sg_iter;
+
+ for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {
+ struct page *p = sg_page_iter_page(&sg_iter);
+ drm_clflush_pages(&p, 1);
+ }
#else
pr_err("Architecture has no drm_cache.c support\n");
WARN_ON_ONCE(1);
--
2.21.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm: add cache support for arm64
2019-07-30 22:58 [PATCH] drm: add cache support for arm64 Rob Clark
@ 2019-07-30 23:59 ` Rob Clark
0 siblings, 0 replies; 2+ messages in thread
From: Rob Clark @ 2019-07-30 23:59 UTC (permalink / raw)
To: dri-devel
Cc: Rob Clark, Maarten Lankhorst, Maxime Ripard, Sean Paul,
David Airlie, Daniel Vetter, Linux Kernel Mailing List
On Tue, Jul 30, 2019 at 4:01 PM Rob Clark <robdclark@gmail.com> wrote:
>
> From: Rob Clark <robdclark@chromium.org>
>
> Signed-off-by: Rob Clark <robdclark@chromium.org>
> ---
> Not sure about 32b arm, but at least for aarch64 this is relatively
> easy. So lets at least enable for arm64.
hmm, bleh, I thought this was too easy.. I hadn't noticed that (even
though driver was =m) CONFIG_DRM was =y
Can we make drm_cache.o built-in even if the rest of drm is a module?
BR,
-R
>
> drivers/gpu/drm/drm_cache.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
> index 3bd76e918b5d..90105c637797 100644
> --- a/drivers/gpu/drm/drm_cache.c
> +++ b/drivers/gpu/drm/drm_cache.c
> @@ -69,6 +69,14 @@ static void drm_cache_flush_clflush(struct page *pages[],
> }
> #endif
>
> +#if defined(__powerpc__)
> +static void __flush_dcache_area(void *addr, size_t len)
> +{
> + flush_dcache_range((unsigned long)addr,
> + (unsigned long)addr + PAGE_SIZE);
> +}
> +#endif
> +
> /**
> * drm_clflush_pages - Flush dcache lines of a set of pages.
> * @pages: List of pages to be flushed.
> @@ -90,7 +98,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
> if (wbinvd_on_all_cpus())
> pr_err("Timed out waiting for cache flush\n");
>
> -#elif defined(__powerpc__)
> +#elif defined(__powerpc__) || defined(CONFIG_ARM64)
> unsigned long i;
> for (i = 0; i < num_pages; i++) {
> struct page *page = pages[i];
> @@ -100,8 +108,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
> continue;
>
> page_virtual = kmap_atomic(page);
> - flush_dcache_range((unsigned long)page_virtual,
> - (unsigned long)page_virtual + PAGE_SIZE);
> + __flush_dcache_area(page_virtual, PAGE_SIZE);
> kunmap_atomic(page_virtual);
> }
> #else
> @@ -135,6 +142,13 @@ drm_clflush_sg(struct sg_table *st)
>
> if (wbinvd_on_all_cpus())
> pr_err("Timed out waiting for cache flush\n");
> +#elif defined(CONFIG_ARM64)
> + struct sg_page_iter sg_iter;
> +
> + for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {
> + struct page *p = sg_page_iter_page(&sg_iter);
> + drm_clflush_pages(&p, 1);
> + }
> #else
> pr_err("Architecture has no drm_cache.c support\n");
> WARN_ON_ONCE(1);
> --
> 2.21.0
>
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