* [PATCH 02/20] dt-bindings: timer: Convert Allwinner A10 Timer to a schema
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 03/20] dt-bindings: timer: Add missing compatibles Daniel Lezcano
` (17 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Maxime Ripard, Rob Herring, Mark Rutland,
Chen-Yu Tsai,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/Allwinner sunXi SoC support
From: Maxime Ripard <maxime.ripard@bootlin.com>
The older Allwinner SoCs have a Timer supported in Linux, with a matching
Device Tree binding.
While the original binding only mentions one interrupt, the timer actually
has 6 of them.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../timer/allwinner,sun4i-a10-timer.yaml | 76 +++++++++++++++++++
.../bindings/timer/allwinner,sun4i-timer.txt | 19 -----
2 files changed, 76 insertions(+), 19 deletions(-)
create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
new file mode 100644
index 000000000000..7292a424092c
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 Timer Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ enum:
+ - allwinner,sun4i-a10-timer
+ - allwinner,suniv-f1c100s-timer
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description:
+ List of timers interrupts
+
+ clocks:
+ maxItems: 1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ items:
+ const: allwinner,sun4i-a10-timer
+
+ then:
+ properties:
+ interrupts:
+ minItems: 6
+ maxItems: 6
+
+ - if:
+ properties:
+ compatible:
+ items:
+ const: allwinner,suniv-f1c100s-timer
+
+ then:
+ properties:
+ interrupts:
+ minItems: 3
+ maxItems: 3
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ timer {
+ compatible = "allwinner,sun4i-a10-timer";
+ reg = <0x01c20c00 0x400>;
+ interrupts = <22>,
+ <23>,
+ <24>,
+ <25>,
+ <67>,
+ <68>;
+ clocks = <&osc>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
deleted file mode 100644
index 3da9d515c03a..000000000000
--- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-Allwinner A1X SoCs Timer Controller
-
-Required properties:
-
-- compatible : should be one of the following:
- "allwinner,sun4i-a10-timer"
- "allwinner,suniv-f1c100s-timer"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : The interrupt of the first timer
-- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
-
-Example:
-
-timer {
- compatible = "allwinner,sun4i-a10-timer";
- reg = <0x01c20c00 0x400>;
- interrupts = <22>;
- clocks = <&osc>;
-};
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 03/20] dt-bindings: timer: Add missing compatibles
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
2019-08-26 20:43 ` [PATCH 02/20] dt-bindings: timer: Convert Allwinner A10 Timer to a schema Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 04/20] clocksource: sun4i: " Daniel Lezcano
` (16 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Maxime Ripard, Rob Herring, Mark Rutland,
Chen-Yu Tsai,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/Allwinner sunXi SoC support
From: Maxime Ripard <maxime.ripard@bootlin.com>
Newer Allwinner SoCs have different number of interrupts, let's add
different compatibles for all of them to deal with this properly.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../timer/allwinner,sun4i-a10-timer.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
index 7292a424092c..20adc1c8e9cc 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
@@ -14,6 +14,8 @@ properties:
compatible:
enum:
- allwinner,sun4i-a10-timer
+ - allwinner,sun8i-a23-timer
+ - allwinner,sun8i-v3s-timer
- allwinner,suniv-f1c100s-timer
reg:
@@ -39,6 +41,30 @@ allOf:
minItems: 6
maxItems: 6
+ - if:
+ properties:
+ compatible:
+ items:
+ const: allwinner,sun8i-a23-timer
+
+ then:
+ properties:
+ interrupts:
+ minItems: 2
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ items:
+ const: allwinner,sun8i-v3s-timer
+
+ then:
+ properties:
+ interrupts:
+ minItems: 3
+ maxItems: 3
+
- if:
properties:
compatible:
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 04/20] clocksource: sun4i: Add missing compatibles
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
2019-08-26 20:43 ` [PATCH 02/20] dt-bindings: timer: Convert Allwinner A10 Timer to a schema Daniel Lezcano
2019-08-26 20:43 ` [PATCH 03/20] dt-bindings: timer: Add missing compatibles Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 05/20] dt-bindings: timer: Convert Allwinner A13 HSTimer to a schema Daniel Lezcano
` (15 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Maxime Ripard, Chen-Yu Tsai,
moderated list:ARM/Allwinner sunXi SoC support
From: Maxime Ripard <maxime.ripard@bootlin.com>
Newer Allwinner SoCs have different number of interrupts, let's add
different compatibles for all of them to deal with this properly.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-sun4i.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clocksource/timer-sun4i.c b/drivers/clocksource/timer-sun4i.c
index 65f38f6ca714..0ba8155b8287 100644
--- a/drivers/clocksource/timer-sun4i.c
+++ b/drivers/clocksource/timer-sun4i.c
@@ -219,5 +219,9 @@ static int __init sun4i_timer_init(struct device_node *node)
}
TIMER_OF_DECLARE(sun4i, "allwinner,sun4i-a10-timer",
sun4i_timer_init);
+TIMER_OF_DECLARE(sun8i_a23, "allwinner,sun8i-a23-timer",
+ sun4i_timer_init);
+TIMER_OF_DECLARE(sun8i_v3s, "allwinner,sun8i-v3s-timer",
+ sun4i_timer_init);
TIMER_OF_DECLARE(suniv, "allwinner,suniv-f1c100s-timer",
sun4i_timer_init);
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 05/20] dt-bindings: timer: Convert Allwinner A13 HSTimer to a schema
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (2 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 04/20] clocksource: sun4i: " Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 06/20] clocksource/drivers/tcb_clksrc: Register delay timer Daniel Lezcano
` (14 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Maxime Ripard, Rob Herring, Mark Rutland,
Chen-Yu Tsai,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/Allwinner sunXi SoC support
From: Maxime Ripard <maxime.ripard@bootlin.com>
The newer Allwinner SoCs have a High Speed Timer supported in Linux, with a
matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../timer/allwinner,sun5i-a13-hstimer.txt | 26 ------
.../timer/allwinner,sun5i-a13-hstimer.yaml | 79 +++++++++++++++++++
2 files changed, 79 insertions(+), 26 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
deleted file mode 100644
index 2c5c1be78360..000000000000
--- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-Allwinner SoCs High Speed Timer Controller
-
-Required properties:
-
-- compatible : should be "allwinner,sun5i-a13-hstimer" or
- "allwinner,sun7i-a20-hstimer"
-- reg : Specifies base physical address and size of the registers.
-- interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
- one)
-- clocks: phandle to the source clock (usually the AHB clock)
-
-Optional properties:
-- resets: phandle to a reset controller asserting the timer
-
-Example:
-
-timer@1c60000 {
- compatible = "allwinner,sun7i-a20-hstimer";
- reg = <0x01c60000 0x1000>;
- interrupts = <0 51 1>,
- <0 52 1>,
- <0 53 1>,
- <0 54 1>;
- clocks = <&ahb1_gates 19>;
- resets = <&ahb1rst 19>;
-};
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
new file mode 100644
index 000000000000..dfa0c41fd261
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A13 High-Speed Timer Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: allwinner,sun5i-a13-hstimer
+ - const: allwinner,sun7i-a20-hstimer
+ - items:
+ - const: allwinner,sun6i-a31-hstimer
+ - const: allwinner,sun7i-a20-hstimer
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 2
+ maxItems: 4
+ items:
+ - description: Timer 0 Interrupt
+ - description: Timer 1 Interrupt
+ - description: Timer 2 Interrupt
+ - description: Timer 3 Interrupt
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+if:
+ properties:
+ compatible:
+ items:
+ const: allwinner,sun5i-a13-hstimer
+
+then:
+ properties:
+ interrupts:
+ minItems: 2
+ maxItems: 2
+
+else:
+ properties:
+ interrupts:
+ minItems: 4
+ maxItems: 4
+
+additionalProperties: false
+
+examples:
+ - |
+ timer@1c60000 {
+ compatible = "allwinner,sun7i-a20-hstimer";
+ reg = <0x01c60000 0x1000>;
+ interrupts = <0 51 1>,
+ <0 52 1>,
+ <0 53 1>,
+ <0 54 1>;
+ clocks = <&ahb1_gates 19>;
+ resets = <&ahb1rst 19>;
+ };
+
+...
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 06/20] clocksource/drivers/tcb_clksrc: Register delay timer
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (3 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 05/20] dt-bindings: timer: Convert Allwinner A13 HSTimer to a schema Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 07/20] clocksource/drivers/imx-sysctr: Add internal clock divider handle Daniel Lezcano
` (13 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Alexandre Belloni, Nicolas Ferre,
Ludovic Desroches,
moderated list:ARM/Microchip (AT91) SoC support
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
Implement and register delay timer to allow get_cycles() to work properly.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/Kconfig | 2 +-
drivers/clocksource/timer-atmel-tcb.c | 18 ++++++++++++++++++
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 5e9317dc3d39..a642c23b2fba 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -429,7 +429,7 @@ config ATMEL_ST
config ATMEL_TCB_CLKSRC
bool "Atmel TC Block timer driver" if COMPILE_TEST
- depends on HAS_IOMEM
+ depends on ARM && HAS_IOMEM
select TIMER_OF if OF
help
Support for Timer Counter Blocks on Atmel SoCs.
diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c
index 6ed31f9def7e..7427b07495a8 100644
--- a/drivers/clocksource/timer-atmel-tcb.c
+++ b/drivers/clocksource/timer-atmel-tcb.c
@@ -6,6 +6,7 @@
#include <linux/irq.h>
#include <linux/clk.h>
+#include <linux/delay.h>
#include <linux/err.h>
#include <linux/ioport.h>
#include <linux/io.h>
@@ -125,6 +126,18 @@ static u64 notrace tc_sched_clock_read32(void)
return tc_get_cycles32(&clksrc);
}
+static struct delay_timer tc_delay_timer;
+
+static unsigned long tc_delay_timer_read(void)
+{
+ return tc_get_cycles(&clksrc);
+}
+
+static unsigned long notrace tc_delay_timer_read32(void)
+{
+ return tc_get_cycles32(&clksrc);
+}
+
#ifdef CONFIG_GENERIC_CLOCKEVENTS
struct tc_clkevt_device {
@@ -432,6 +445,7 @@ static int __init tcb_clksrc_init(struct device_node *node)
/* setup ony channel 0 */
tcb_setup_single_chan(&tc, best_divisor_idx);
tc_sched_clock = tc_sched_clock_read32;
+ tc_delay_timer.read_current_timer = tc_delay_timer_read32;
} else {
/* we have three clocks no matter what the
* underlying platform supports.
@@ -444,6 +458,7 @@ static int __init tcb_clksrc_init(struct device_node *node)
/* setup both channel 0 & 1 */
tcb_setup_dual_chan(&tc, best_divisor_idx);
tc_sched_clock = tc_sched_clock_read;
+ tc_delay_timer.read_current_timer = tc_delay_timer_read;
}
/* and away we go! */
@@ -458,6 +473,9 @@ static int __init tcb_clksrc_init(struct device_node *node)
sched_clock_register(tc_sched_clock, 32, divided_rate);
+ tc_delay_timer.freq = divided_rate;
+ register_current_timer_delay(&tc_delay_timer);
+
return 0;
err_unregister_clksrc:
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 07/20] clocksource/drivers/imx-sysctr: Add internal clock divider handle
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (4 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 06/20] clocksource/drivers/tcb_clksrc: Register delay timer Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 08/20] arm64: dts: imx8mm: Add system counter node Daniel Lezcano
` (12 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Anson Huang, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
From: Anson Huang <Anson.Huang@nxp.com>
The system counter block guide states that the base clock is
internally divided by 3 before use, that means the clock input of
system counter defined in DT should be base clock which is normally
from OSC, and then internally divided by 3 before use.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-imx-sysctr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clocksource/timer-imx-sysctr.c b/drivers/clocksource/timer-imx-sysctr.c
index fd7d68066efb..b7c80a368a1b 100644
--- a/drivers/clocksource/timer-imx-sysctr.c
+++ b/drivers/clocksource/timer-imx-sysctr.c
@@ -20,6 +20,8 @@
#define SYS_CTR_EN 0x1
#define SYS_CTR_IRQ_MASK 0x2
+#define SYS_CTR_CLK_DIV 0x3
+
static void __iomem *sys_ctr_base;
static u32 cmpcr;
@@ -134,6 +136,9 @@ static int __init sysctr_timer_init(struct device_node *np)
if (ret)
return ret;
+ /* system counter clock is divided by 3 internally */
+ to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV;
+
sys_ctr_base = timer_of_base(&to_sysctr);
cmpcr = readl(sys_ctr_base + CMPCR);
cmpcr &= ~SYS_CTR_EN;
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 08/20] arm64: dts: imx8mm: Add system counter node
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (5 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 07/20] clocksource/drivers/imx-sysctr: Add internal clock divider handle Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 09/20] arm64: dts: imx8mq: " Daniel Lezcano
` (11 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Anson Huang, Rob Herring, Mark Rutland, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Leonard Crestez, Jacky Bai, Daniel Baluta,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
From: Anson Huang <Anson.Huang@nxp.com>
Add i.MX8MM system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 232a7412755a..89ef22a8f81e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -510,6 +510,14 @@
#pwm-cells = <2>;
status = "disabled";
};
+
+ system_counter: timer@306a0000 {
+ compatible = "nxp,sysctr-timer";
+ reg = <0x306a0000 0x20000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc_24m>;
+ clock-names = "per";
+ };
};
aips3: bus@30800000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 09/20] arm64: dts: imx8mq: Add system counter node
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (6 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 08/20] arm64: dts: imx8mm: Add system counter node Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 10/20] clocksource/drivers/renesas-ostm: Use DIV_ROUND_CLOSEST() helper Daniel Lezcano
` (10 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Anson Huang, Rob Herring, Mark Rutland, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Lucas Stach, Abel Vesa, Carlo Caione,
Andrey Smirnov, Angus Ainslie (Purism),
Guido Günther,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
From: Anson Huang <Anson.Huang@nxp.com>
Add i.MX8MQ system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808eff87..b4529773af51 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -635,6 +635,14 @@
#pwm-cells = <2>;
status = "disabled";
};
+
+ system_counter: timer@306a0000 {
+ compatible = "nxp,sysctr-timer";
+ reg = <0x306a0000 0x20000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc_25m>;
+ clock-names = "per";
+ };
};
bus@30800000 { /* AIPS3 */
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 10/20] clocksource/drivers/renesas-ostm: Use DIV_ROUND_CLOSEST() helper
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (7 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 09/20] arm64: dts: imx8mq: " Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 11/20] clocksource/drivers/npcm: Fix GENMASK and timer operation Daniel Lezcano
` (9 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Geert Uytterhoeven, Maxime Coquelin,
Alexandre Torgue, moderated list:ARM/STM32 ARCHITECTURE,
moderated list:ARM/STM32 ARCHITECTURE
From: Geert Uytterhoeven <geert+renesas@glider.be>
Use the DIV_ROUND_CLOSEST() helper instead of open-coding the same
operation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/renesas-ostm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
index 61d5f3b539ce..37c39b901bb1 100644
--- a/drivers/clocksource/renesas-ostm.c
+++ b/drivers/clocksource/renesas-ostm.c
@@ -221,7 +221,7 @@ static int __init ostm_init(struct device_node *np)
}
rate = clk_get_rate(ostm_clk);
- ostm->ticks_per_jiffy = (rate + HZ / 2) / HZ;
+ ostm->ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ);
/*
* First probed device will be used as system clocksource. Any
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 11/20] clocksource/drivers/npcm: Fix GENMASK and timer operation
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (8 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 10/20] clocksource/drivers/renesas-ostm: Use DIV_ROUND_CLOSEST() helper Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:43 ` [PATCH 12/20] clocksource/drivers/timer-of: Do not warn on deferred probe Daniel Lezcano
` (8 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Avi Fishman, Tomer Maimon, Tali Perry,
Patrick Venture, Nancy Yuen, Benjamin Fair,
moderated list:ARM/NUVOTON NPCM ARCHITECTURE
From: Avi Fishman <avifishman70@gmail.com>
NPCM7XX_Tx_OPER GENMASK bits are wrong, fix them.
Hopefully the NPCM7XX_REG_TICR0 register reset value of those bits was 0,
so it did not cause an issue.
The function npcm7xx_timer_oneshot() reads the register
NPCM7XX_REG_TCSR0, modifies it and then reads it again overwriting the
previous changes. Remove the extra read which is pointless.
The function npcm7xx_timer_periodic() is correct but the code writes
to the NPCM7XX_REG_TICR0 register while it is dealing with the
NPCM7XX_REG_TCSR0 register, that is confusing. Separate the write to
the registers in the code for the sake of clarity.
Fixes: 1c00289ecd12 ("clocksource/drivers/npcm: Add NPCM7xx timer driver")
Signed-off-by: Avi Fishman <avifishman70@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-npcm7xx.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c
index 8a30da7f083b..9780ffd8010e 100644
--- a/drivers/clocksource/timer-npcm7xx.c
+++ b/drivers/clocksource/timer-npcm7xx.c
@@ -32,7 +32,7 @@
#define NPCM7XX_Tx_INTEN BIT(29)
#define NPCM7XX_Tx_COUNTEN BIT(30)
#define NPCM7XX_Tx_ONESHOT 0x0
-#define NPCM7XX_Tx_OPER GENMASK(27, 3)
+#define NPCM7XX_Tx_OPER GENMASK(28, 27)
#define NPCM7XX_Tx_MIN_PRESCALE 0x1
#define NPCM7XX_Tx_TDR_MASK_BITS 24
#define NPCM7XX_Tx_MAX_CNT 0xFFFFFF
@@ -84,8 +84,6 @@ static int npcm7xx_timer_oneshot(struct clock_event_device *evt)
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
val &= ~NPCM7XX_Tx_OPER;
-
- val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
val |= NPCM7XX_START_ONESHOT_Tx;
writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
@@ -97,12 +95,11 @@ static int npcm7xx_timer_periodic(struct clock_event_device *evt)
struct timer_of *to = to_timer_of(evt);
u32 val;
+ writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0);
+
val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
val &= ~NPCM7XX_Tx_OPER;
-
- writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0);
val |= NPCM7XX_START_PERIODIC_Tx;
-
writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
return 0;
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 12/20] clocksource/drivers/timer-of: Do not warn on deferred probe
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (9 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 11/20] clocksource/drivers/npcm: Fix GENMASK and timer operation Daniel Lezcano
@ 2019-08-26 20:43 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 13/20] clocksource/drivers: Do not warn on probe defer Daniel Lezcano
` (7 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:43 UTC (permalink / raw)
To: tglx; +Cc: linux-kernel, Jon Hunter
From: Jon Hunter <jonathanh@nvidia.com>
Deferred probe is an expected return value for clk_get() on many
platforms. The driver deals with it properly, so there's no need
to output a warning that may potentially confuse users.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-of.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/timer-of.c b/drivers/clocksource/timer-of.c
index 80542289fae7..d8c2bd4391d0 100644
--- a/drivers/clocksource/timer-of.c
+++ b/drivers/clocksource/timer-of.c
@@ -113,8 +113,10 @@ static __init int timer_of_clk_init(struct device_node *np,
of_clk->clk = of_clk->name ? of_clk_get_by_name(np, of_clk->name) :
of_clk_get(np, of_clk->index);
if (IS_ERR(of_clk->clk)) {
- pr_err("Failed to get clock for %pOF\n", np);
- return PTR_ERR(of_clk->clk);
+ ret = PTR_ERR(of_clk->clk);
+ if (ret != -EPROBE_DEFER)
+ pr_err("Failed to get clock for %pOF\n", np);
+ goto out;
}
ret = clk_prepare_enable(of_clk->clk);
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 13/20] clocksource/drivers: Do not warn on probe defer
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (10 preceding siblings ...)
2019-08-26 20:43 ` [PATCH 12/20] clocksource/drivers/timer-of: Do not warn on deferred probe Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 14/20] dt-bindings: timer: renesas, cmt: Add CMT0234 to sh73a0 and r8a7740 Daniel Lezcano
` (6 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx; +Cc: linux-kernel, Jon Hunter
From: Jon Hunter <jonathanh@nvidia.com>
Deferred probe is an expected return value on many platforms and so
there's no need to output a warning that may potentially confuse users.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/timer-probe.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-probe.c b/drivers/clocksource/timer-probe.c
index dda1946e84dd..ee9574da53c0 100644
--- a/drivers/clocksource/timer-probe.c
+++ b/drivers/clocksource/timer-probe.c
@@ -29,7 +29,9 @@ void __init timer_probe(void)
ret = init_func_ret(np);
if (ret) {
- pr_err("Failed to initialize '%pOF': %d\n", np, ret);
+ if (ret != -EPROBE_DEFER)
+ pr_err("Failed to initialize '%pOF': %d\n", np,
+ ret);
continue;
}
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 14/20] dt-bindings: timer: renesas, cmt: Add CMT0234 to sh73a0 and r8a7740
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (11 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 13/20] clocksource/drivers: Do not warn on probe defer Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 15/20] dt-bindings: timer: renesas, cmt: Update CMT1 on " Daniel Lezcano
` (5 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Magnus Damm, Rob Herring, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
From: Magnus Damm <damm+renesas@opensource.se>
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter input clock" (clock input and on-device divider)
One example is that RCLK 1/1 is supported by CMT2, CMT3 and CMT4.
- "Wakeup request" (supported by CMT0 and CMT2)
Because of this one unique compat string per CMT device is selected.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index c5220bcd852b..45840d475050 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -22,6 +22,10 @@ Required Properties:
- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
+ - "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740.
+ - "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740.
+ - "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740.
+ - "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740.
- "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.
- "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.
- "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.
@@ -54,6 +58,10 @@ Required Properties:
- "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
- "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
+ - "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.
+ - "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.
+ - "renesas,sh73a0-cmt3" for the 32-bit CMT3 device included in sh73a0.
+ - "renesas,sh73a0-cmt4" for the 32-bit CMT4 device included in sh73a0.
- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
and RZ/G1.
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 15/20] dt-bindings: timer: renesas, cmt: Update CMT1 on sh73a0 and r8a7740
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (12 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 14/20] dt-bindings: timer: renesas, cmt: Add CMT0234 to sh73a0 and r8a7740 Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 16/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a7792 Daniel Lezcano
` (4 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Magnus Damm, Rob Herring, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
From: Magnus Damm <damm+renesas@opensource.se>
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
is removed from the DT binding documentation, however software support for
this deprecated binding will still remain in the CMT driver for some time.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../devicetree/bindings/timer/renesas,cmt.txt | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index 45840d475050..a297fca5b61e 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -12,17 +12,10 @@ datasheets.
Required Properties:
- compatible: must contain one or more of the following:
- - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
- (CMT1)
- - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
- (CMT1)
- - "renesas,cmt-48" for all non-second generation 48-bit CMT
- (CMT1 on sh73a0 and r8a7740)
- This is a fallback for the above renesas,cmt-48-* entries.
-
- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
- "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740.
+ - "renesas,r8a7740-cmt1" for the 48-bit CMT1 device included in r8a7740.
- "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740.
- "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740.
- "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740.
@@ -59,6 +52,7 @@ Required Properties:
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
- "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
- "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.
+ - "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0.
- "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.
- "renesas,sh73a0-cmt3" for the 32-bit CMT3 device included in sh73a0.
- "renesas,sh73a0-cmt4" for the 32-bit CMT4 device included in sh73a0.
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 16/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a7792
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (13 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 15/20] dt-bindings: timer: renesas, cmt: Update CMT1 on " Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 17/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a77995 Daniel Lezcano
` (3 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Magnus Damm, Rob Herring, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
From: Magnus Damm <damm+renesas@opensource.se>
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index a297fca5b61e..5b7690ae8b9d 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -35,6 +35,8 @@ Required Properties:
- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
- "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791.
+ - "renesas,r8a7792-cmt0" for the 32-bit CMT0 device included in r8a7792.
+ - "renesas,r8a7792-cmt1" for the 48-bit CMT1 device included in r8a7792.
- "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793.
- "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 17/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a77995
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (14 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 16/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a7792 Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 18/20] dt-bindings: timer: renesas, cmt: Update R-Car Gen3 CMT1 usage Daniel Lezcano
` (2 subsequent siblings)
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Magnus Damm, Rob Herring, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
From: Magnus Damm <damm+renesas@opensource.se>
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index 5b7690ae8b9d..c7fdcb02e083 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -53,6 +53,8 @@ Required Properties:
- "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
- "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
+ - "renesas,r8a77995-cmt0" for the 32-bit CMT0 device included in r8a77995.
+ - "renesas,r8a77995-cmt1" for the 48-bit CMT1 device included in r8a77995.
- "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.
- "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0.
- "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 18/20] dt-bindings: timer: renesas, cmt: Update R-Car Gen3 CMT1 usage
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (15 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 17/20] dt-bindings: timer: renesas, cmt: Add CMT0 and CMT1 to r8a77995 Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 19/20] clocksource/drivers/sh_cmt: r8a7740 and sh73a0 SoC-specific match Daniel Lezcano
2019-08-26 20:44 ` [PATCH 20/20] clocksource/drivers/sh_cmt: Document "cmt-48" as deprecated Daniel Lezcano
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx
Cc: linux-kernel, Magnus Damm, Rob Herring, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
From: Magnus Damm <damm+renesas@opensource.se>
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet information "CMT2/3 are exactly same as CMT1"
it seems that CMT2 and CMT3 now use the CMT1 compat string in the DTSI.
Clarify this in the DT binding documentation by describing R-Car Gen3 and
RZ/G2 CMT1 as "48-bit CMT devices".
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
.../devicetree/bindings/timer/renesas,cmt.txt | 20 +++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index c7fdcb02e083..a444cfc5852a 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -28,9 +28,9 @@ Required Properties:
- "renesas,r8a77470-cmt0" for the 32-bit CMT0 device included in r8a77470.
- "renesas,r8a77470-cmt1" for the 48-bit CMT1 device included in r8a77470.
- "renesas,r8a774a1-cmt0" for the 32-bit CMT0 device included in r8a774a1.
- - "renesas,r8a774a1-cmt1" for the 48-bit CMT1 device included in r8a774a1.
+ - "renesas,r8a774a1-cmt1" for the 48-bit CMT devices included in r8a774a1.
- "renesas,r8a774c0-cmt0" for the 32-bit CMT0 device included in r8a774c0.
- - "renesas,r8a774c0-cmt1" for the 48-bit CMT1 device included in r8a774c0.
+ - "renesas,r8a774c0-cmt1" for the 48-bit CMT devices included in r8a774c0.
- "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
@@ -42,19 +42,19 @@ Required Properties:
- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
- "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.
- - "renesas,r8a7795-cmt1" for the 48-bit CMT1 device included in r8a7795.
+ - "renesas,r8a7795-cmt1" for the 48-bit CMT devices included in r8a7795.
- "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.
- - "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796.
+ - "renesas,r8a7796-cmt1" for the 48-bit CMT devices included in r8a7796.
- "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.
- - "renesas,r8a77965-cmt1" for the 48-bit CMT1 device included in r8a77965.
+ - "renesas,r8a77965-cmt1" for the 48-bit CMT devices included in r8a77965.
- "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.
- - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.
+ - "renesas,r8a77970-cmt1" for the 48-bit CMT devices included in r8a77970.
- "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.
- - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
+ - "renesas,r8a77980-cmt1" for the 48-bit CMT devices included in r8a77980.
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
- - "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
+ - "renesas,r8a77990-cmt1" for the 48-bit CMT devices included in r8a77990.
- "renesas,r8a77995-cmt0" for the 32-bit CMT0 device included in r8a77995.
- - "renesas,r8a77995-cmt1" for the 48-bit CMT1 device included in r8a77995.
+ - "renesas,r8a77995-cmt1" for the 48-bit CMT devices included in r8a77995.
- "renesas,sh73a0-cmt0" for the 32-bit CMT0 device included in sh73a0.
- "renesas,sh73a0-cmt1" for the 48-bit CMT1 device included in sh73a0.
- "renesas,sh73a0-cmt2" for the 32-bit CMT2 device included in sh73a0.
@@ -69,7 +69,7 @@ Required Properties:
listed above.
- "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3
and RZ/G2.
- - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3
+ - "renesas,rcar-gen3-cmt1" for 48-bit CMT devices included in R-Car Gen3
and RZ/G2.
These are fallbacks for R-Car Gen3 and RZ/G2 entries listed
above.
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 19/20] clocksource/drivers/sh_cmt: r8a7740 and sh73a0 SoC-specific match
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (16 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 18/20] dt-bindings: timer: renesas, cmt: Update R-Car Gen3 CMT1 usage Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
2019-08-26 20:44 ` [PATCH 20/20] clocksource/drivers/sh_cmt: Document "cmt-48" as deprecated Daniel Lezcano
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx; +Cc: linux-kernel, Magnus Damm
From: Magnus Damm <damm+renesas@opensource.se>
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "renesas,<soc>-<device>"
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/sh_cmt.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index f6424b61e212..abf5e7873a18 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -924,6 +924,14 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
.compatible = "renesas,cmt-48-gen2",
.data = &sh_cmt_info[SH_CMT0_RCAR_GEN2]
},
+ {
+ .compatible = "renesas,r8a7740-cmt1",
+ .data = &sh_cmt_info[SH_CMT_48BIT]
+ },
+ {
+ .compatible = "renesas,sh73a0-cmt1",
+ .data = &sh_cmt_info[SH_CMT_48BIT]
+ },
{
.compatible = "renesas,rcar-gen2-cmt0",
.data = &sh_cmt_info[SH_CMT0_RCAR_GEN2]
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH 20/20] clocksource/drivers/sh_cmt: Document "cmt-48" as deprecated
2019-08-26 20:43 ` [PATCH 01/20] clocksource: Remove dev_err() usage after platform_get_irq() Daniel Lezcano
` (17 preceding siblings ...)
2019-08-26 20:44 ` [PATCH 19/20] clocksource/drivers/sh_cmt: r8a7740 and sh73a0 SoC-specific match Daniel Lezcano
@ 2019-08-26 20:44 ` Daniel Lezcano
18 siblings, 0 replies; 24+ messages in thread
From: Daniel Lezcano @ 2019-08-26 20:44 UTC (permalink / raw)
To: tglx; +Cc: linux-kernel, Magnus Damm
From: Magnus Damm <damm+renesas@opensource.se>
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the DT compat string.
In case of the only in-tree users r8a7740 and sh73a0 the compat strings
"renesas,r8a7740-cmt1" and "renesas,sh73a0-cmt1" may be used instead.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/sh_cmt.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index abf5e7873a18..ef773db080e9 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -918,7 +918,11 @@ static const struct platform_device_id sh_cmt_id_table[] = {
MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
static const struct of_device_id sh_cmt_of_table[] __maybe_unused = {
- { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] },
+ {
+ /* deprecated, preserved for backward compatibility */
+ .compatible = "renesas,cmt-48",
+ .data = &sh_cmt_info[SH_CMT_48BIT]
+ },
{
/* deprecated, preserved for backward compatibility */
.compatible = "renesas,cmt-48-gen2",
--
2.17.1
^ permalink raw reply related [flat|nested] 24+ messages in thread