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From: Wolfram Sang <wsa@the-dreams.de>
To: Jean Delvare <jdelvare@suse.de>
Cc: Linux I2C <linux-i2c@vger.kernel.org>,
	linux-kernel@vger.kernel.org, Andrew Cooks <acooks@rationali.st>,
	linux-acpi@vger.kernel.org, platypus-sw@opengear.com,
	"Tobin C . Harding" <me@tobin.cc>,
	Guenter Roeck <linux@roeck-us.net>,
	Will Wagner <willw@carallon.com>
Subject: Re: [PATCH v5 1/3] i2c: piix4: Fix port selection for AMD Family 16h Model 30h
Date: Thu, 29 Aug 2019 22:19:41 +0200	[thread overview]
Message-ID: <20190829201941.GQ3740@ninjato> (raw)
In-Reply-To: <20190802145246.76c90f20@endymion>

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On Fri, Aug 02, 2019 at 02:52:46PM +0200, Jean Delvare wrote:
> From: Andrew Cooks <andrew.cooks@opengear.com>
> 
> Family 16h Model 30h SMBus controller needs the same port selection fix
> as described and fixed in commit 0fe16195f891 ("i2c: piix4: Fix SMBus port
> selection for AMD Family 17h chips")
> 
> commit 6befa3fde65f ("i2c: piix4: Support alternative port selection
> register") also fixed the port selection for Hudson2, but unfortunately
> this is not the exact same device and the AMD naming and PCI Device IDs
> aren't particularly helpful here.
> 
> The SMBus port selection register is common to the following Families
> and models, as documented in AMD's publicly available BIOS and Kernel
> Developer Guides:
> 
>  50742 - Family 15h Model 60h-6Fh (PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)
>  55072 - Family 15h Model 70h-7Fh (PCI_DEVICE_ID_AMD_KERNCZ_SMBUS)
>  52740 - Family 16h Model 30h-3Fh (PCI_DEVICE_ID_AMD_HUDSON2_SMBUS)
> 
> The Hudson2 PCI Device ID (PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) is shared
> between Bolton FCH and Family 16h Model 30h, but the location of the
> SmBus0Sel port selection bits are different:
> 
>  51192 - Bolton Register Reference Guide
> 
> We distinguish between Bolton and Family 16h Model 30h using the PCI
> Revision ID:
> 
>   Bolton is device 0x780b, revision 0x15
>   Family 16h Model 30h is device 0x780b, revision 0x1F
>   Family 15h Model 60h and 70h are both device 0x790b, revision 0x4A.
> 
> The following additional public AMD BKDG documents were checked and do
> not share the same port selection register:
> 
>  42301 - Family 15h Model 00h-0Fh doesn't mention any
>  42300 - Family 15h Model 10h-1Fh doesn't mention any
>  49125 - Family 15h Model 30h-3Fh doesn't mention any
> 
>  48751 - Family 16h Model 00h-0Fh uses the previously supported
>          index register SB800_PIIX4_PORT_IDX_ALT at 0x2e
> 
> Signed-off-by: Andrew Cooks <andrew.cooks@opengear.com>
> Signed-off-by: Jean Delvare <jdelvare@suse.de>
> Cc: stable@vger.kernel.org [v4.6+]

Applied to for-current, thanks!


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  reply	other threads:[~2019-08-29 20:19 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-02 12:51 [PATCH v5 0/3] Enable ACPI-defined peripherals on i2c-piix4 SMBus Jean Delvare
2019-08-02 12:52 ` [PATCH v5 1/3] i2c: piix4: Fix port selection for AMD Family 16h Model 30h Jean Delvare
2019-08-29 20:19   ` Wolfram Sang [this message]
2019-08-02 12:54 ` [PATCH v5 2/3] i2c: piix4: Fix probing of reserved ports on " Jean Delvare
2019-08-29 20:20   ` Wolfram Sang
2019-08-02 12:55 ` [PATCH v5 3/3] i2c: piix4: Add ACPI support Jean Delvare
2019-08-29 20:21   ` Wolfram Sang
2019-08-08  9:17 ` [PATCH v5 0/3] Enable ACPI-defined peripherals on i2c-piix4 SMBus Enrico Weigelt, metux IT consult
2019-08-09  8:33   ` Jean Delvare
2019-08-09 15:53     ` Enrico Weigelt, metux IT consult
2019-08-14 16:07       ` Wolfram Sang
2019-08-11  3:09     ` Andrew Cooks
2019-08-11  2:52   ` Andrew Cooks
2019-08-19 18:30     ` Enrico Weigelt, metux IT consult
2019-08-19 18:53       ` Wolfram Sang
2019-08-20 10:42         ` Enrico Weigelt, metux IT consult
2019-08-20 10:53           ` Wolfram Sang
2019-08-28 22:48       ` Andrew Cooks

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