[GIT PULL] Please pull FPGA Manager changes for 5.4

[GIT PULL] Please pull FPGA Manager changes for 5.4

[Moritz Fischer]

The following changes since commit 2949dc443116a66fd1a92d9ef107be16cdd197cd:

  dt-bindings: fpga: Consolidate bridge properties (2019-07-24 14:19:15 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git/ tags/fpga-cvp-for-5.4

for you to fetch changes up to e58915179f3f4a839ea3b9aeae1c1e13e98e33b1:

  fpga: altera-cvp: Add Stratix10 (V2) Support (2019-08-24 11:38:29 -0700)

----------------------------------------------------------------
FPGA Manager changes for 5.4-rc1

Here is the second set of changes for the 5.4 merge window.

This patchset adds support for the v2 revision of Intel (Altera)'s CVP
parts including the Stratix 10.

All of this patches have been reviewed and been in the last few
linux-next releases without issues.

Signed-off-by: Moritz Fischer <mdf@kernel.org>

----------------------------------------------------------------
Thor Thayer (3):
      fpga: altera-cvp: Discover Vendor Specific offset
      fpga: altera-cvp: Preparation for V2 parts.
      fpga: altera-cvp: Add Stratix10 (V2) Support

 drivers/fpga/Kconfig      |   6 +-
 drivers/fpga/altera-cvp.c | 339 ++++++++++++++++++++++++++++++++++++----------
 2 files changed, 271 insertions(+), 74 deletions(-)

Re: [GIT PULL] Please pull FPGA Manager changes for 5.4

[Greg KH]

On Sat, Aug 31, 2019 at 01:45:28PM -0700, Moritz Fischer wrote:
> The following changes since commit 2949dc443116a66fd1a92d9ef107be16cdd197cd:
> 
>   dt-bindings: fpga: Consolidate bridge properties (2019-07-24 14:19:15 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git/ tags/fpga-cvp-for-5.4

Pulled and pushed out, thanks.

greg k-h

[GIT PULL] Please pull FPGA Manager changes for 5.4

[Moritz Fischer]

The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:

  Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git tags/fpga-for-5.4

for you to fetch changes up to 2949dc443116a66fd1a92d9ef107be16cdd197cd:

  dt-bindings: fpga: Consolidate bridge properties (2019-07-24 14:19:15 -0700)

----------------------------------------------------------------
FPGA Manager changes for 5.4-rc1

Here is the first set of changes for the 5.4-rc1 merge window.

They're all more or less cleanup patches:

- Carlos' patch addresses a checkpatch warning
- My first patch changes the return type of a function to align it with
  the fact that nothing checks the return value and it uncoditionally
  returned 0 anyways
- My second patch somehow fell through the cracks before and cleans up
  the FPGA bridge bindings by consolidating them instead of repeating
  the same paragraph over and over again.

All of these patches have been in the last few linux-next releases
without issues.

Signed-off-by: Moritz Fischer <mdf@kernel.org>

----------------------------------------------------------------
Carlos A Petry (1):
      fpga: altera-cvp: Fix function definition argument

Moritz Fischer (2):
      fpga: altera-pr-ip: Make alt_pr_unregister function void
      dt-bindings: fpga: Consolidate bridge properties

 .../devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt   |  5 +----
 .../devicetree/bindings/fpga/altera-freeze-bridge.txt       |  5 +----
 .../devicetree/bindings/fpga/altera-hps2fpga-bridge.txt     |  5 +----
 Documentation/devicetree/bindings/fpga/fpga-bridge.txt      | 13 +++++++++++++
 .../devicetree/bindings/fpga/xilinx-pr-decoupler.txt        |  8 ++------
 drivers/fpga/altera-cvp.c                                   |  3 ++-
 drivers/fpga/altera-pr-ip-core-plat.c                       |  4 +++-
 drivers/fpga/altera-pr-ip-core.c                            |  4 +---
 include/linux/fpga/altera-pr-ip-core.h                      |  2 +-
 9 files changed, 25 insertions(+), 24 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.txt