From: Andrew Lunn <andrew@lunn.ch>
To: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: Voon Weifeng <weifeng.voon@intel.com>,
"David S. Miller" <davem@davemloft.net>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Ong Boon Leong <boon.leong.ong@intel.com>
Subject: Re: [PATCH v3 net-next] net: stmmac: Add support for MDIO interrupts
Date: Fri, 6 Sep 2019 16:24:46 +0200 [thread overview]
Message-ID: <20190906142446.GA29611@lunn.ch> (raw)
In-Reply-To: <BN8PR12MB3266D427D1AB8E41B13441B6D3BA0@BN8PR12MB3266.namprd12.prod.outlook.com>
On Fri, Sep 06, 2019 at 01:31:14PM +0000, Jose Abreu wrote:
> From: Voon Weifeng <weifeng.voon@intel.com>
> Date: Sep/05/2019, 13:05:30 (UTC+00:00)
>
> > DW EQoS v5.xx controllers added capability for interrupt generation
> > when MDIO interface is done (GMII Busy bit is cleared).
> > This patch adds support for this interrupt on supported HW to avoid
> > polling on GMII Busy bit.
>
> Better leave the enabling of this optional because the support for it is
> also optional depending on the IP HW configuration.
Hi Jose
If there a register which indicates if this feature is part of the IP?
Andrew
next prev parent reply other threads:[~2019-09-06 14:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-05 12:05 [PATCH v3 net-next] net: stmmac: Add support for MDIO interrupts Voon Weifeng
2019-09-06 13:31 ` Jose Abreu
2019-09-06 14:24 ` Andrew Lunn [this message]
2019-09-06 14:33 ` Jose Abreu
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