[PATCH] drm/amd/display: rename variable eanble -> enable

[PATCH] drm/amd/display: rename variable eanble -> enable

[Colin King]

From: Colin Ian King <colin.king@canonical.com>

There is a spelling mistake in the variable name eanble,
rename it to enable.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
index 1488ffddf4e3..5944524faab9 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
@@ -606,11 +606,11 @@ static void dce_mi_allocate_dmif(
 	}
 
 	if (dce_mi->wa.single_head_rdreq_dmif_limit) {
-		uint32_t eanble =  (total_stream_num > 1) ? 0 :
+		uint32_t enable =  (total_stream_num > 1) ? 0 :
 				dce_mi->wa.single_head_rdreq_dmif_limit;
 
 		REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
-				ENABLE, eanble);
+				ENABLE, enable);
 	}
 }
 
@@ -636,11 +636,11 @@ static void dce_mi_free_dmif(
 			10, 3500);
 
 	if (dce_mi->wa.single_head_rdreq_dmif_limit) {
-		uint32_t eanble =  (total_stream_num > 1) ? 0 :
+		uint32_t enable =  (total_stream_num > 1) ? 0 :
 				dce_mi->wa.single_head_rdreq_dmif_limit;
 
 		REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
-				ENABLE, eanble);
+				ENABLE, enable);
 	}
 }
 
-- 
2.20.1

Re: [PATCH] drm/amd/display: rename variable eanble -> enable

[Alex Deucher]

On Fri, Sep 13, 2019 at 4:02 AM Colin King <colin.king@canonical.com> wrote:
>
> From: Colin Ian King <colin.king@canonical.com>
>
> There is a spelling mistake in the variable name eanble,
> rename it to enable.
>
> Signed-off-by: Colin Ian King <colin.king@canonical.com>

Applied.  thanks!

Alex

> ---
>  drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
> index 1488ffddf4e3..5944524faab9 100644
> --- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
> +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
> @@ -606,11 +606,11 @@ static void dce_mi_allocate_dmif(
>         }
>
>         if (dce_mi->wa.single_head_rdreq_dmif_limit) {
> -               uint32_t eanble =  (total_stream_num > 1) ? 0 :
> +               uint32_t enable =  (total_stream_num > 1) ? 0 :
>                                 dce_mi->wa.single_head_rdreq_dmif_limit;
>
>                 REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
> -                               ENABLE, eanble);
> +                               ENABLE, enable);
>         }
>  }
>
> @@ -636,11 +636,11 @@ static void dce_mi_free_dmif(
>                         10, 3500);
>
>         if (dce_mi->wa.single_head_rdreq_dmif_limit) {
> -               uint32_t eanble =  (total_stream_num > 1) ? 0 :
> +               uint32_t enable =  (total_stream_num > 1) ? 0 :
>                                 dce_mi->wa.single_head_rdreq_dmif_limit;
>
>                 REG_UPDATE(MC_HUB_RDREQ_DMIF_LIMIT,
> -                               ENABLE, eanble);
> +                               ENABLE, enable);
>         }
>  }
>
> --
> 2.20.1
>
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