* [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema
@ 2019-09-21 17:01 Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Krzysztof Kozlowski
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Changes since v1:
1. Indent example with four spaces (more readable),
2. Rename nodes in example to timer,
3. Remove mct-map subnode.
---
.../bindings/timer/samsung,exynos4210-mct.txt | 88 --------------
.../timer/samsung,exynos4210-mct.yaml | 113 ++++++++++++++++++
2 files changed, 113 insertions(+), 88 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
create mode 100644 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
deleted file mode 100644
index 8f78640ad64c..000000000000
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
+++ /dev/null
@@ -1,88 +0,0 @@
-Samsung's Multi Core Timer (MCT)
-
-The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
-global timer and CPU local timers. The global timer is a 64-bit free running
-up-counter and can generate 4 interrupts when the counter reaches one of the
-four preset counter values. The CPU local timers are 32-bit free running
-down-counters and generate an interrupt when the counter expires. There is
-one CPU local timer instantiated in MCT for every CPU in the system.
-
-Required properties:
-
-- compatible: should be "samsung,exynos4210-mct".
- (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
- (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
-
-- reg: base address of the mct controller and length of the address space
- it occupies.
-
-- interrupts: the list of interrupts generated by the controller. The following
- should be the order of the interrupts specified. The local timer interrupts
- should be specified after the four global timer interrupts have been
- specified.
-
- 0: Global Timer Interrupt 0
- 1: Global Timer Interrupt 1
- 2: Global Timer Interrupt 2
- 3: Global Timer Interrupt 3
- 4: Local Timer Interrupt 0
- 5: Local Timer Interrupt 1
- 6: ..
- 7: ..
- i: Local Timer Interrupt n
-
- For MCT block that uses a per-processor interrupt for local timers, such
- as ones compatible with "samsung,exynos4412-mct", only one local timer
- interrupt might be specified, meaning that all local timers use the same
- per processor interrupt.
-
-Example 1: In this example, the IP contains two local timers, using separate
- interrupts, so two local timer interrupts have been specified,
- in addition to four global timer interrupts.
-
- mct@10050000 {
- compatible = "samsung,exynos4210-mct";
- reg = <0x10050000 0x800>;
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>, <0 48 0>;
- };
-
-Example 2: In this example, the timer interrupts are connected to two separate
- interrupt controllers. Hence, an interrupt-map is created to map
- the interrupts to the respective interrupt controllers.
-
- mct@101c0000 {
- compatible = "samsung,exynos4210-mct";
- reg = <0x101C0000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0 &gic 0 57 0>,
- <1 &gic 0 69 0>,
- <2 &combiner 12 6>,
- <3 &combiner 12 7>,
- <4 &gic 0 42 0>,
- <5 &gic 0 48 0>;
- };
- };
-
-Example 3: In this example, the IP contains four local timers, but using
- a per-processor interrupt to handle them. Either all the local
- timer interrupts can be specified, with the same interrupt specifier
- value or just the first one.
-
- mct@10050000 {
- compatible = "samsung,exynos4412-mct";
- reg = <0x10050000 0x800>;
-
- /* Both ways are possible in this case. Either: */
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>;
- /* or: */
- interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
- <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
- };
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
new file mode 100644
index 000000000000..5d6db1ddd7f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
@@ -0,0 +1,113 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC Multi Core Timer (MCT)
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+description: |+
+ The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
+ global timer and CPU local timers. The global timer is a 64-bit free running
+ up-counter and can generate 4 interrupts when the counter reaches one of the
+ four preset counter values. The CPU local timers are 32-bit free running
+ down-counters and generate an interrupt when the counter expires. There is
+ one CPU local timer instantiated in MCT for every CPU in the system.
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos4210-mct
+ - samsung,exynos4412-mct
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: |
+ Interrupts should be put in specific order. This is, the local timer
+ interrupts should be specified after the four global timer interrupts
+ have been specified:
+ 0: Global Timer Interrupt 0
+ 1: Global Timer Interrupt 1
+ 2: Global Timer Interrupt 2
+ 3: Global Timer Interrupt 3
+ 4: Local Timer Interrupt 0
+ 5: Local Timer Interrupt 1
+ 6: ..
+ 7: ..
+ i: Local Timer Interrupt n
+ For MCT block that uses a per-processor interrupt for local timers, such
+ as ones compatible with "samsung,exynos4412-mct", only one local timer
+ interrupt might be specified, meaning that all local timers use the same
+ per processor interrupt.
+ minItems: 5 # 4 Global + 1 local
+ maxItems: 20 # 4 Global + 16 local
+
+required:
+ - compatible
+ - interrupts
+ - reg
+
+examples:
+ - |
+ // In this example, the IP contains two local timers, using separate
+ // interrupts, so two local timer interrupts have been specified,
+ // in addition to four global timer interrupts.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x10050000 0x800>;
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>, <0 48 0>;
+ };
+
+ - |
+ // In this example, the timer interrupts are connected to two separate
+ // interrupt controllers. Hence, an interrupt-map is created to map
+ // the interrupts to the respective interrupt controllers.
+
+ mct: timer@101c0000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x101C0000 0x800>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&mct>;
+ interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
+ interrupt-map = <0 &gic 0 57 0>,
+ <1 &gic 0 69 0>,
+ <2 &combiner 12 6>,
+ <3 &combiner 12 7>,
+ <4 &gic 0 42 0>,
+ <5 &gic 0 48 0>;
+ };
+
+ - |
+ // In this example, the IP contains four local timers, but using
+ // a per-processor interrupt to handle them. Only one first local
+ // interrupt is specified.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4412-mct";
+ reg = <0x10050000 0x800>;
+
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>;
+ };
+
+ - |
+ // In this example, the IP contains four local timers, but using
+ // a per-processor interrupt to handle them. All the local timer
+ // interrupts are specified.
+
+ timer@10050000 {
+ compatible = "samsung,exynos4412-mct";
+ reg = <0x10050000 0x800>;
+
+ interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
+ <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer"
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 3/8] arm64: " Krzysztof Kozlowski
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
The device node name should reflect generic class of a device so rename
the Multi Core Timer node from "mct" to "timer". This will be also in
sync with upcoming DT schema. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos4210.dtsi | 2 +-
arch/arm/boot/dts/exynos4412.dtsi | 2 +-
arch/arm/boot/dts/exynos5250.dtsi | 2 +-
arch/arm/boot/dts/exynos5260.dtsi | 2 +-
arch/arm/boot/dts/exynos54xx.dtsi | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 784818490376..d122fb52d3d4 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -265,7 +265,7 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
- mct@10050000 {
+ timer@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index f220716239db..6d3f19562aab 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -106,7 +106,7 @@
arm,data-latency = <2 2 1>;
};
- mct: mct@10050000 {
+ mct: timer@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index d20db2dfe8e2..8b6d5875c75d 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -243,7 +243,7 @@
clock-names = "aclk200", "aclk400_mcuisp";
};
- mct@10050000 {
+ timer@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index fc966c10cf49..7a01349317a3 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -233,7 +233,7 @@
power-domains = <&pd_mau>;
};
- mct@101c0000 {
+ timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 3581b57fbbf7..b0811dbbb362 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -180,7 +180,7 @@
reg = <0x10000000 0x100>;
};
- mct: mct@100b0000 {
+ mct: timer@100b0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x100B0000 0x1000>;
clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 9c3b63b7cac6..247d23872384 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -64,7 +64,7 @@
};
};
- mct: mct@101c0000 {
+ mct: timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0xb00>;
interrupt-parent = <&mct_map>;
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/8] arm64: dts: exynos: Rename Multi Core Timer node to "timer"
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Krzysztof Kozlowski
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
The device node name should reflect generic class of a device so rename
the Multi Core Timer node from "mct" to "timer". This will be also in
sync with upcoming DT schema. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index a76f620f7f35..8baf3c645eae 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -754,7 +754,7 @@
status = "disabled";
};
- mct@101c0000 {
+ timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0x800>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 3/8] arm64: " Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-23 6:56 ` Marek Szyprowski
2019-09-21 17:01 ` [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Krzysztof Kozlowski
` (3 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Not tested.
---
arch/arm/boot/dts/exynos4210.dtsi | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 6d3f19562aab..38c49ab8c733 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -109,23 +109,19 @@
mct: timer@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map =
- <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&mct>;
+ interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
+ interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
<5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
- };
};
watchdog: watchdog@10060000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
` (2 preceding siblings ...)
2019-09-21 17:01 ` [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Krzysztof Kozlowski
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Tested on Odroid U3 (Exynos4412).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/boot/dts/exynos4412.dtsi | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 8b6d5875c75d..7e2dabefd53f 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -243,25 +243,21 @@
clock-names = "aclk200", "aclk400_mcuisp";
};
- timer@10050000 {
+ mct: timer@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map =
- <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&mct>;
+ interrupts = <0>, <1>, <2>, <3>, <4>;
+ interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
<4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
- };
};
watchdog: watchdog@10060000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
` (3 preceding siblings ...)
2019-09-21 17:01 ` [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Krzysztof Kozlowski
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Not tested.
---
arch/arm/boot/dts/exynos5250.dtsi | 30 ++++++++++++------------------
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 7a01349317a3..e0fcf3c2f537 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -233,28 +233,22 @@
power-domains = <&pd_mau>;
};
- timer@101c0000 {
+ mct: timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&mct_map>;
- interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
- <4 0>, <5 0>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <2>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0x0 0 &combiner 23 3>,
- <0x1 0 &combiner 23 4>,
- <0x2 0 &combiner 25 2>,
- <0x3 0 &combiner 25 3>,
- <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
- };
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&mct>;
+ interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
+ interrupt-map = <0 &combiner 23 3>,
+ <1 &combiner 23 4>,
+ <2 &combiner 25 2>,
+ <3 &combiner 25 3>,
+ <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_0: pinctrl@11400000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
` (4 preceding siblings ...)
2019-09-21 17:01 ` [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Krzysztof Kozlowski
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale
Octa (Exynos5420).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/boot/dts/exynos54xx.dtsi | 37 ++++++++++++++-----------------
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 247d23872384..a1c10a9a86f8 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -67,27 +67,24 @@
mct: timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0xb00>;
- interrupt-parent = <&mct_map>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&mct>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
- <8>, <9>, <10>, <11>;
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0 &combiner 23 3>,
- <1 &combiner 23 4>,
- <2 &combiner 25 2>,
- <3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
- <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
- <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
- <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
- <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
- <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
- <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
- };
+ <8>, <9>, <10>, <11>;
+ interrupt-map = <0 &combiner 23 3>,
+ <1 &combiner 23 4>,
+ <2 &combiner 25 2>,
+ <3 &combiner 25 3>,
+ <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
+ <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
+ <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
+ <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
+ <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
+ <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
+ <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@101d0000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
` (5 preceding siblings ...)
2019-09-21 17:01 ` [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Krzysztof Kozlowski
@ 2019-09-21 17:01 ` Krzysztof Kozlowski
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-21 17:01 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, Krzysztof Kozlowski, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Marek Szyprowski, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Replace hard-coded number with appropriate define for GIC SPI or PPI
specifier in interrupt. This makes code easier to read. No expected
functionality change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/boot/dts/exynos4210.dtsi | 8 ++++----
arch/arm/boot/dts/exynos4412.dtsi | 4 ++--
arch/arm/boot/dts/exynos5250.dtsi | 4 ++--
arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++--------
4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 38c49ab8c733..650bee6355e4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -116,12 +116,12 @@
#interrupt-cells = <1>;
interrupt-parent = <&mct>;
interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
- interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
- <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <1 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
- <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7e2dabefd53f..0810c14bf424 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -253,11 +253,11 @@
#interrupt-cells = <1>;
interrupt-parent = <&mct>;
interrupts = <0>, <1>, <2>, <3>, <4>;
- interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<1 &combiner 12 5>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
- <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index e0fcf3c2f537..61f22feefda9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -247,8 +247,8 @@
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_0: pinctrl@11400000 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a1c10a9a86f8..f52c7ce5d320 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -77,14 +77,14 @@
<1 &combiner 23 4>,
<2 &combiner 25 2>,
<3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
- <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
- <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
- <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
- <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
- <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
- <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+ <4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <6 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <7 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <8 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <9 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <10 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <11 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@101d0000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210
2019-09-21 17:01 ` [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Krzysztof Kozlowski
@ 2019-09-23 6:56 ` Marek Szyprowski
2019-09-23 7:13 ` Krzysztof Kozlowski
0 siblings, 1 reply; 10+ messages in thread
From: Marek Szyprowski @ 2019-09-23 6:56 UTC (permalink / raw)
To: Krzysztof Kozlowski, Daniel Lezcano, Thomas Gleixner,
Rob Herring, Mark Rutland, Kukjin Kim, linux-kernel, devicetree,
linux-arm-kernel, linux-samsung-soc
Cc: Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
Hi Krzysztof,
On 21.09.2019 19:01, Krzysztof Kozlowski wrote:
> Multi Core Timer node has interrupts routed to two different parents -
> GIC and combiner. This was modeled with a interrupt-map within a
> subnode but can be expressed in an easier and more common way, directly
> in the node itself.
Maybe we should simply use 'interrupts-extended' based approach and
simplify mct node even more (get rid of interrupt-parent, interrupts,
size/address cells)?
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> ---
>
> Not tested.
> ---
> arch/arm/boot/dts/exynos4210.dtsi | 16 ++++++----------
> 1 file changed, 6 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
> index 6d3f19562aab..38c49ab8c733 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -109,23 +109,19 @@
> mct: timer@10050000 {
> compatible = "samsung,exynos4210-mct";
> reg = <0x10050000 0x800>;
> - interrupt-parent = <&mct_map>;
> - interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
> clock-names = "fin_pll", "mct";
> -
> - mct_map: mct-map {
> - #interrupt-cells = <1>;
> - #address-cells = <0>;
> - #size-cells = <0>;
> - interrupt-map =
> - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
> + #address-cells = <0>;
> + #size-cells = <0>;
> + #interrupt-cells = <1>;
> + interrupt-parent = <&mct>;
> + interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
> <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
> <2 &combiner 12 6>,
> <3 &combiner 12 7>,
> <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
> <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
> - };
> };
>
> watchdog: watchdog@10060000 {
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210
2019-09-23 6:56 ` Marek Szyprowski
@ 2019-09-23 7:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2019-09-23 7:13 UTC (permalink / raw)
To: Marek Szyprowski
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Mark Rutland,
Kukjin Kim, linux-kernel, devicetree, linux-arm-kernel,
linux-samsung-soc, Bartlomiej Zolnierkiewicz, Sylwester Nawrocki
On Mon, Sep 23, 2019 at 08:56:46AM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 21.09.2019 19:01, Krzysztof Kozlowski wrote:
> > Multi Core Timer node has interrupts routed to two different parents -
> > GIC and combiner. This was modeled with a interrupt-map within a
> > subnode but can be expressed in an easier and more common way, directly
> > in the node itself.
>
> Maybe we should simply use 'interrupts-extended' based approach and
> simplify mct node even more (get rid of interrupt-parent, interrupts,
> size/address cells)?
Indeed, that looks like the tool for this job. Thanks for hint, I'll try
it.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-09-23 7:13 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 3/8] arm64: " Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Krzysztof Kozlowski
2019-09-23 6:56 ` Marek Szyprowski
2019-09-23 7:13 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Krzysztof Kozlowski
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