From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: jason@lakedaemon.net, andrew@lunn.ch,
gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
robh+dt@kernel.org, mark.rutland@arm.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Chris Packham <chris.packham@alliedtelesis.co.nz>
Subject: [PATCH 2/3] ARM: dts: mvebu: add sdram controller node to Armada-38x
Date: Fri, 27 Sep 2019 11:28:19 +1200 [thread overview]
Message-ID: <20190926232820.27676-3-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20190926232820.27676-1-chris.packham@alliedtelesis.co.nz>
The Armada-38x uses an SDRAM controller that is compatible with the
Armada-XP. The key difference is the width of the bus (XP is 64/32, 38x
is 32/16). The SDRAM controller registers are the same between the two
SoCs.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
arch/arm/boot/dts/armada-38x.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3f4bb44d85f0..e038abc0c6b4 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -103,6 +103,11 @@
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+ sdramc: sdramc@1400 {
+ compatible = "marvell,armada-xp-sdram-controller";
+ reg = <0x1400 0x500>;
+ };
+
L2: cache-controller@8000 {
compatible = "arm,pl310-cache";
reg = <0x8000 0x1000>;
--
2.23.0
next prev parent reply other threads:[~2019-09-26 23:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-26 23:28 [PATCH 0/3] ARM: dts: SDRAM and L2 cache EDAC for Armada SoCs Chris Packham
2019-09-26 23:28 ` [PATCH 1/3] ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg Chris Packham
2019-09-26 23:28 ` Chris Packham [this message]
2019-09-26 23:28 ` [PATCH 3/3] ARM: dts: armada-xp: add label to sdram-controller node Chris Packham
2019-10-08 9:57 ` [PATCH 0/3] ARM: dts: SDRAM and L2 cache EDAC for Armada SoCs Gregory CLEMENT
-- strict thread matches above, loose matches on Subject: below --
2018-01-08 22:31 [PATCH 0/3] EDAC: support for Armada 38x and 98dx3236 SoCs Chris Packham
2018-01-08 22:31 ` [PATCH 2/3] ARM: dts: mvebu: add sdram controller node to Armada-38x Chris Packham
2018-01-10 8:31 ` Gregory CLEMENT
2018-01-10 20:19 ` Chris Packham
2018-01-11 9:06 ` Gregory CLEMENT
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190926232820.27676-3-chris.packham@alliedtelesis.co.nz \
--to=chris.packham@alliedtelesis.co.nz \
--cc=andrew@lunn.ch \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=jason@lakedaemon.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=sebastian.hesselbarth@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).