[PATCH] PCI/PM: Note that PME can be generated from D0

[PATCH] PCI/PM: Note that PME can be generated from D0

[Bjorn Helgaas]

From: Bjorn Helgaas <bhelgaas@google.com>

Per PCIe r5.0 sec 7.5.2.1, PME may be generated from D0, so update
Documentation/power/pci.rst to reflect that.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 Documentation/power/pci.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/power/pci.rst b/Documentation/power/pci.rst
index db41a770a2f5..a90e82c70a3b 100644
--- a/Documentation/power/pci.rst
+++ b/Documentation/power/pci.rst
@@ -130,8 +130,8 @@ a full power-on reset sequence and the power-on defaults are restored to the
 device by hardware just as at initial power up.
 
 PCI devices supporting the PCI PM Spec can be programmed to generate PMEs
-while in a low-power state (D1-D3), but they are not required to be capable
-of generating PMEs from all supported low-power states.  In particular, the
+while in any power state (D0-D3), but they are not required to be capable
+of generating PMEs from all supported power states.  In particular, the
 capability of generating PMEs from D3cold is optional and depends on the
 presence of additional voltage (3.3Vaux) allowing the device to remain
 sufficiently active to generate a wakeup signal.
-- 
2.23.0.700.g56cf767bdb-goog

Re: [PATCH] PCI/PM: Note that PME can be generated from D0

[Rafael J. Wysocki]

On Wed, Oct 16, 2019 at 9:44 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> From: Bjorn Helgaas <bhelgaas@google.com>
>
> Per PCIe r5.0 sec 7.5.2.1, PME may be generated from D0, so update
> Documentation/power/pci.rst to reflect that.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Good catch:

Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

> ---
>  Documentation/power/pci.rst | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/power/pci.rst b/Documentation/power/pci.rst
> index db41a770a2f5..a90e82c70a3b 100644
> --- a/Documentation/power/pci.rst
> +++ b/Documentation/power/pci.rst
> @@ -130,8 +130,8 @@ a full power-on reset sequence and the power-on defaults are restored to the
>  device by hardware just as at initial power up.
>
>  PCI devices supporting the PCI PM Spec can be programmed to generate PMEs
> -while in a low-power state (D1-D3), but they are not required to be capable
> -of generating PMEs from all supported low-power states.  In particular, the
> +while in any power state (D0-D3), but they are not required to be capable
> +of generating PMEs from all supported power states.  In particular, the
>  capability of generating PMEs from D3cold is optional and depends on the
>  presence of additional voltage (3.3Vaux) allowing the device to remain
>  sufficiently active to generate a wakeup signal.
> --
> 2.23.0.700.g56cf767bdb-goog
>