linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>,
	x86@kernel.org
Cc: "Mark Rutland" <mark.rutland@arm.com>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	"Jiri Olsa" <jolsa@redhat.com>,
	"Namhyung Kim" <namhyung@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	linux-kernel@vger.kernel.org,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Vitaly Kuznetsov" <vkuznets@redhat.com>,
	"Wanpeng Li" <wanpengli@tencent.com>,
	"Jim Mattson" <jmattson@google.com>,
	kvm@vger.kernel.org,
	"Sean Christopherson" <sean.j.christopherson@intel.com>
Subject: [PATCH v2 15/16] perf/x86: Provide stubs of KVM helpers for non-Intel CPUs
Date: Mon, 21 Oct 2019 17:12:29 -0700	[thread overview]
Message-ID: <20191022001229.2697-1-sean.j.christopherson@intel.com> (raw)
In-Reply-To: <20191021234632.32363-1-sean.j.christopherson@intel.com>

Provide stubs for perf_guest_get_msrs() and intel_pt_handle_vmx() when
building without support for Intel CPUs, i.e. CPU_SUP_INTEL=n.  Lack of
stubs is not currently a problem as the only user, KVM_INTEL, takes a
dependency on CPU_SUP_INTEL=y.  Provide the stubs for all CPUs so that
KVM_INTEL can be built for any CPU with compatible hardware support,
e.g. Centuar and Zhaoxin CPUs.

Note, the existing stub for perf_guest_get_msrs() is essentially dead
code as KVM selects CONFIG_PERF_EVENTS, i.e. the only user guarantees
the full implementation is built.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>
Cc: Wanpeng Li <wanpengli@tencent.com>
Cc: Jim Mattson <jmattson@google.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 arch/x86/include/asm/perf_event.h | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index ee26e9215f18..29964b0e1075 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -322,17 +322,10 @@ struct perf_guest_switch_msr {
 	u64 host, guest;
 };
 
-extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
 extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);
 extern void perf_check_microcode(void);
 extern int x86_perf_rdpmc_index(struct perf_event *event);
 #else
-static inline struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
-{
-	*nr = 0;
-	return NULL;
-}
-
 static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
 {
 	memset(cap, 0, sizeof(*cap));
@@ -342,8 +335,23 @@ static inline void perf_events_lapic_init(void)	{ }
 static inline void perf_check_microcode(void) { }
 #endif
 
+#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
+extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
+#else
+static inline struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
+{
+	*nr = 0;
+	return NULL;
+}
+#endif
+
 #ifdef CONFIG_CPU_SUP_INTEL
  extern void intel_pt_handle_vmx(int on);
+#else
+static inline void intel_pt_handle_vmx(int on)
+{
+
+}
 #endif
 
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
-- 
2.22.0


  parent reply	other threads:[~2019-10-22  0:12 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-21 23:46 [PATCH v2 00/16] x86/cpu: Clean up handling of VMX features Sean Christopherson
2019-10-21 23:54 ` [PATCH v2 01/16] x86/intel: Initialize IA32_FEATURE_CONTROL MSR at boot Sean Christopherson
2019-10-22  0:15   ` Sean Christopherson
2019-10-25 14:09   ` Borislav Petkov
2019-10-25 15:11     ` Sean Christopherson
2019-10-21 23:56 ` [PATCH v2 02/16] x86/mce: WARN once if IA32_FEATURE_CONTROL MSR is left unlocked Sean Christopherson
2019-10-25 14:22   ` Borislav Petkov
2019-10-22  0:08 ` [PATCH v2 03/16] x86/centaur: Use common IA32_FEATURE_CONTROL MSR initialization Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 04/16] x86/zhaoxin: " Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 05/16] KVM: VMX: Drop initialization of IA32_FEATURE_CONTROL MSR Sean Christopherson
2019-10-22 10:51   ` Paolo Bonzini
2019-10-22 15:16     ` Sean Christopherson
2019-11-14 18:34       ` Sean Christopherson
2019-11-15 10:10         ` Paolo Bonzini
2019-10-25 16:26   ` Borislav Petkov
2019-10-25 16:39     ` Borislav Petkov
2019-10-22  0:08 ` [PATCH v2 06/16] x86/cpu: Clear VMX feature flag if VMX is not fully enabled Sean Christopherson
2019-10-25 16:38   ` Borislav Petkov
2019-11-14 18:32     ` Sean Christopherson
2019-11-15 10:05       ` Paolo Bonzini
2019-11-15 10:34         ` Borislav Petkov
2019-11-15 15:34           ` Sean Christopherson
2019-11-15 15:39             ` Borislav Petkov
2019-10-22  0:08 ` [PATCH v2 07/16] KVM: VMX: Use VMX feature flag to query BIOS enabling Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 08/16] KVM: VMX: Check for full VMX support when verifying CPU compatibility Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 09/16] x86/vmx: Introduce VMX_FEATURES_* Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 10/16] x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 11/16] x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 12/16] x86/cpufeatures: Drop synthetic VMX feature flags Sean Christopherson
2019-10-22  0:08 ` [PATCH v2 13/16] KVM: VMX: Use VMX_FEATURE_* flags to define VMCS control bits Sean Christopherson
2019-10-22  0:09 ` [PATCH v2 14/16] x86/cpufeatures: Clean up synthetic virtualization flags Sean Christopherson
2019-10-22  0:12 ` Sean Christopherson [this message]
2019-10-22  0:12 ` [PATCH v2 16/16] KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs Sean Christopherson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191022001229.2697-1-sean.j.christopherson@intel.com \
    --to=sean.j.christopherson@intel.com \
    --cc=acme@kernel.org \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=bp@alien8.de \
    --cc=hpa@zytor.com \
    --cc=jmattson@google.com \
    --cc=jolsa@redhat.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=rkrcmar@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=vkuznets@redhat.com \
    --cc=wanpengli@tencent.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).