From: "Ondřej Jirman" <megous@megous.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: linux-sunxi <linux-sunxi@googlegroups.com>,
stable <stable@vger.kernel.org>,
Maxime Ripard <mripard@kernel.org>,
Russell King <linux@armlinux.org.uk>,
"moderated list:ARM/Allwinner sunXi SoC support"
<linux-arm-kernel@lists.infradead.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [linux-sunxi] [PATCH] ARM: sunxi: Fix CPU powerdown on A83T
Date: Tue, 29 Oct 2019 02:25:17 +0100 [thread overview]
Message-ID: <20191029012517.eddekmphtxyslevx@core.my.home> (raw)
In-Reply-To: <CAGb2v67Vy=tD4dfSXD+=HS3B2tEE-bH2D++gx9Oa=P8n-012ew@mail.gmail.com>
On Tue, Oct 29, 2019 at 09:09:40AM +0800, Chen-Yu Tsai wrote:
> On Tue, Oct 29, 2019 at 5:49 AM Ondrej Jirman <megous@megous.com> wrote:
> >
> > PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this
> > patch, instead of gating the CPU0, the whole cluster was power gated,
> > when shutting down first CPU in the cluster.
> >
> > Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T")
> > Signed-off-by: Ondrej Jirman <megous@megous.com>
> > Cc: stable@vger.kernel.org
>
> Acked-by: Chen-Yu Tsai <wens@csie.org>
>
> Though I distinctly remember the BSP had some code dealing with chip
> revisions in which the two bits were reversed. :(
Actually, it's a bit more complicated. There's a special check in BSP
code (grep for SUN8IW6P1_REV_A) that instead of power gating, just
holds the core in reset for that revision.
regards,
o.
next prev parent reply other threads:[~2019-10-29 1:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 21:49 [PATCH] ARM: sunxi: Fix CPU powerdown on A83T Ondrej Jirman
2019-10-29 1:09 ` [linux-sunxi] " Chen-Yu Tsai
2019-10-29 1:25 ` Ondřej Jirman [this message]
2019-10-29 8:10 ` Maxime Ripard
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