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From: kbuild test robot <lkp@intel.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: kbuild-all@lists.01.org, sboyd@kernel.org,
	mturquette@baylibre.com, robh+dt@kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	haitao.suo@bitmain.com, darren.tsao@bitmain.com,
	fisher.cheng@bitmain.com, alec.lin@bitmain.com,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v6 6/7] clk: Add common clock driver for BM1880 SoC
Date: Tue, 29 Oct 2019 17:01:40 +0800	[thread overview]
Message-ID: <201910291647.3JAc9vXN%lkp@intel.com> (raw)
In-Reply-To: <20191026110253.18426-7-manivannan.sadhasivam@linaro.org>

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Hi Manivannan,

I love your patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on v5.4-rc5 next-20191028]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Manivannan-Sadhasivam/Add-Bitmain-BM1880-clock-driver/20191029-142130
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 7.4.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.4.0 make.cross ARCH=mips 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from arch/mips/include/asm/div64.h:12:0,
                    from include/linux/kernel.h:18,
                    from include/linux/list.h:9,
                    from include/linux/kobject.h:19,
                    from include/linux/of.h:17,
                    from include/linux/clk-provider.h:9,
                    from drivers//clk/clk-bm1880.c:9:
   drivers//clk/clk-bm1880.c: In function 'bm1880_pll_rate_calc':
   include/asm-generic/div64.h:226:28: warning: comparison of distinct pointer types lacks a cast
     (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
                               ^
>> drivers//clk/clk-bm1880.c:488:2: note: in expansion of macro 'do_div'
     do_div(numerator, denominator);
     ^~~~~~
   In file included from arch/mips/include/asm/bitops.h:16:0,
                    from include/linux/bitops.h:19,
                    from include/linux/of.h:15,
                    from include/linux/clk-provider.h:9,
                    from drivers//clk/clk-bm1880.c:9:
   include/asm-generic/div64.h:239:25: warning: right shift count >= width of type [-Wshift-count-overflow]
     } else if (likely(((n) >> 32) == 0)) {  \
                            ^
   include/linux/compiler.h:77:40: note: in definition of macro 'likely'
    # define likely(x) __builtin_expect(!!(x), 1)
                                           ^
>> drivers//clk/clk-bm1880.c:488:2: note: in expansion of macro 'do_div'
     do_div(numerator, denominator);
     ^~~~~~
   In file included from arch/mips/include/asm/div64.h:12:0,
                    from include/linux/kernel.h:18,
                    from include/linux/list.h:9,
                    from include/linux/kobject.h:19,
                    from include/linux/of.h:17,
                    from include/linux/clk-provider.h:9,
                    from drivers//clk/clk-bm1880.c:9:
   include/asm-generic/div64.h:243:22: error: passing argument 1 of '__div64_32' from incompatible pointer type [-Werror=incompatible-pointer-types]
      __rem = __div64_32(&(n), __base); \
                         ^
>> drivers//clk/clk-bm1880.c:488:2: note: in expansion of macro 'do_div'
     do_div(numerator, denominator);
     ^~~~~~
   include/asm-generic/div64.h:217:17: note: expected 'uint64_t * {aka long long unsigned int *}' but argument is of type 'long unsigned int *'
    extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
                    ^~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/do_div +488 drivers//clk/clk-bm1880.c

   473	
   474	static unsigned long bm1880_pll_rate_calc(u32 regval, unsigned long parent_rate)
   475	{
   476		u32 fbdiv, fref, refdiv;
   477		u32 postdiv1, postdiv2;
   478		unsigned long rate, numerator, denominator;
   479	
   480		fbdiv = (regval >> 16) & 0xfff;
   481		fref = parent_rate;
   482		refdiv = regval & 0x1f;
   483		postdiv1 = (regval >> 8) & 0x7;
   484		postdiv2 = (regval >> 12) & 0x7;
   485	
   486		numerator = parent_rate * fbdiv;
   487		denominator = refdiv * postdiv1 * postdiv2;
 > 488		do_div(numerator, denominator);
   489		rate = numerator;
   490	
   491		return rate;
   492	}
   493	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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  reply	other threads:[~2019-10-29  9:03 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-26 11:02 [PATCH v6 0/7] Add Bitmain BM1880 clock driver Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 1/7] clk: Zero init clk_init_data in helpers Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 2/7] clk: Add clk_hw_unregister_composite helper function definition Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 3/7] dt-bindings: clock: Add devicetree binding for BM1880 SoC Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 4/7] arm64: dts: bitmain: Add clock controller support " Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 5/7] arm64: dts: bitmain: Source common clock for UART controllers Manivannan Sadhasivam
2019-10-26 11:02 ` [PATCH v6 6/7] clk: Add common clock driver for BM1880 SoC Manivannan Sadhasivam
2019-10-29  9:01   ` kbuild test robot [this message]
2019-10-30  3:44   ` kbuild test robot
2019-10-26 11:02 ` [PATCH v6 7/7] MAINTAINERS: Add entry for BM1880 SoC clock driver Manivannan Sadhasivam
2019-11-13 22:21 ` [PATCH v6 0/7] Add Bitmain BM1880 " Stephen Boyd
2019-11-14  5:34   ` Manivannan Sadhasivam
2019-11-14  5:50     ` Stephen Boyd
2019-11-14  6:09       ` Manivannan Sadhasivam

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