* [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations
2019-11-11 6:51 [PATCH net,v2 0/3] Rework mt762x GDM setup flow MarkLee
@ 2019-11-11 6:51 ` MarkLee
2019-11-12 5:56 ` David Miller
2019-11-11 6:51 ` [PATCH net,v2 2/3] net: ethernet: mediatek: Refine the timing of GDM/PSE setup MarkLee
2019-11-11 6:51 ` [PATCH net,v2 3/3] net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL mode MarkLee
2 siblings, 1 reply; 6+ messages in thread
From: MarkLee @ 2019-11-11 6:51 UTC (permalink / raw)
To: David S. Miller, Sean Wang, John Crispin, Matthias Brugger, Andrew Lunn
Cc: Rob Herring, Mark Rutland, Rene van Dorst, devicetree, netdev,
linux-arm-kernel, linux-mediatek, linux-kernel, Jakub Kicinski,
MarkLee
Integrate GDM/PSE setup operations into single function "mtk_gdm_config"
Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
--
v1->v2:
* Use the macro "MTK_MAC_COUNT" instead of a magic constant
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 37 +++++++++++++--------
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
2 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 703adb96429e..6e7a7fea2f52 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2180,6 +2180,28 @@ static int mtk_start_dma(struct mtk_eth *eth)
return 0;
}
+static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
+{
+ int i;
+
+ for (i = 0; i < MTK_MAC_COUNT; i++) {
+ u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
+
+ /* default setup the forward port to send frame to PDMA */
+ val &= ~0xffff;
+
+ /* Enable RX checksum */
+ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
+
+ val |= config;
+
+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
+ }
+ /*Reset and enable PSE*/
+ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
+ mtk_w32(eth, 0, MTK_RST_GL);
+}
+
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -2375,8 +2397,6 @@ static int mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
mtk_tx_irq_disable(eth, ~0);
mtk_rx_irq_disable(eth, ~0);
- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
- mtk_w32(eth, 0, MTK_RST_GL);
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
@@ -2385,18 +2405,7 @@ static int mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
- for (i = 0; i < MTK_MAC_COUNT; i++) {
- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
-
- /* setup the forward port to send frame to PDMA */
- val &= ~0xffff;
-
- /* Enable RX checksum */
- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
-
- /* setup the mac dma */
- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
- }
+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
return 0;
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 76bd12cb8150..b16d8d9b196a 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -84,6 +84,7 @@
#define MTK_GDMA_ICS_EN BIT(22)
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)
+#define MTK_GDMA_TO_PDMA 0x0
/* Unicast Filter MAC Address Register - Low */
#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations
2019-11-11 6:51 ` [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations MarkLee
@ 2019-11-12 5:56 ` David Miller
2019-11-12 7:12 ` mtk15127
0 siblings, 1 reply; 6+ messages in thread
From: David Miller @ 2019-11-12 5:56 UTC (permalink / raw)
To: Mark-MC.Lee
Cc: sean.wang, john, matthias.bgg, andrew, robh+dt, mark.rutland,
opensource, devicetree, netdev, linux-arm-kernel, linux-mediatek,
linux-kernel, jakub.kicinski
From: MarkLee <Mark-MC.Lee@mediatek.com>
Date: Mon, 11 Nov 2019 14:51:27 +0800
> +static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
> +{
> + int i;
> +
> + for (i = 0; i < MTK_MAC_COUNT; i++) {
> + u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
> +
> + /* default setup the forward port to send frame to PDMA */
> + val &= ~0xffff;
> +
> + /* Enable RX checksum */
> + val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
> +
> + val |= config;
> +
> + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
> + }
> + /*Reset and enable PSE*/
Please put spaces before and after the comment sentence, like:
/* Reset and enable PSE */
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations
2019-11-12 5:56 ` David Miller
@ 2019-11-12 7:12 ` mtk15127
0 siblings, 0 replies; 6+ messages in thread
From: mtk15127 @ 2019-11-12 7:12 UTC (permalink / raw)
To: David Miller
Cc: sean.wang, john, matthias.bgg, andrew, robh+dt, mark.rutland,
opensource, devicetree, netdev, linux-arm-kernel, linux-mediatek,
linux-kernel, jakub.kicinski, Mark-MC.Lee
On Mon, 2019-11-11 at 21:56 -0800, David Miller wrote:
> From: MarkLee <Mark-MC.Lee@mediatek.com>
> Date: Mon, 11 Nov 2019 14:51:27 +0800
>
> > +static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < MTK_MAC_COUNT; i++) {
> > + u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
> > +
> > + /* default setup the forward port to send frame to PDMA */
> > + val &= ~0xffff;
> > +
> > + /* Enable RX checksum */
> > + val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
> > +
> > + val |= config;
> > +
> > + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
> > + }
> > + /*Reset and enable PSE*/
>
> Please put spaces before and after the comment sentence, like:
>
> /* Reset and enable PSE */
>
Thanks for the reminder, will correct it in the next patch.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH net,v2 2/3] net: ethernet: mediatek: Refine the timing of GDM/PSE setup
2019-11-11 6:51 [PATCH net,v2 0/3] Rework mt762x GDM setup flow MarkLee
2019-11-11 6:51 ` [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations MarkLee
@ 2019-11-11 6:51 ` MarkLee
2019-11-11 6:51 ` [PATCH net,v2 3/3] net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL mode MarkLee
2 siblings, 0 replies; 6+ messages in thread
From: MarkLee @ 2019-11-11 6:51 UTC (permalink / raw)
To: David S. Miller, Sean Wang, John Crispin, Matthias Brugger, Andrew Lunn
Cc: Rob Herring, Mark Rutland, Rene van Dorst, devicetree, netdev,
linux-arm-kernel, linux-mediatek, linux-kernel, Jakub Kicinski,
MarkLee
Refine the timing of GDM/PSE setup, move it from mtk_hw_init
to mtk_open. This is recommended by the mt762x HW design to
do GDM/PSE setup only after PDMA has been started.
We exclude mt7628 in mtk_gdm_config function since it is a old IP
and there is no GDM/PSE block on it.
Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
--
v1->v2:
* no change
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 6e7a7fea2f52..b147ab0e44ce 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2184,6 +2184,9 @@ static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
{
int i;
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
+ return;
+
for (i = 0; i < MTK_MAC_COUNT; i++) {
u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
@@ -2222,6 +2225,8 @@ static int mtk_open(struct net_device *dev)
if (err)
return err;
+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
+
napi_enable(ð->tx_napi);
napi_enable(ð->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
@@ -2405,8 +2410,6 @@ static int mtk_hw_init(struct mtk_eth *eth)
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
- mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
-
return 0;
err_disable_pm:
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH net,v2 3/3] net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL mode
2019-11-11 6:51 [PATCH net,v2 0/3] Rework mt762x GDM setup flow MarkLee
2019-11-11 6:51 ` [PATCH net,v2 1/3] net: ethernet: mediatek: Integrate GDM/PSE setup operations MarkLee
2019-11-11 6:51 ` [PATCH net,v2 2/3] net: ethernet: mediatek: Refine the timing of GDM/PSE setup MarkLee
@ 2019-11-11 6:51 ` MarkLee
2 siblings, 0 replies; 6+ messages in thread
From: MarkLee @ 2019-11-11 6:51 UTC (permalink / raw)
To: David S. Miller, Sean Wang, John Crispin, Matthias Brugger, Andrew Lunn
Cc: Rob Herring, Mark Rutland, Rene van Dorst, devicetree, netdev,
linux-arm-kernel, linux-mediatek, linux-kernel, Jakub Kicinski,
MarkLee
Enable GDM GDMA_DROP_ALL mode to drop all packet during the
stop operation. This is recommended by the mt762x HW design
to drop all packet from GMAC before stopping PDMA.
Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
--
v1->v2:
* no change
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index b147ab0e44ce..5fe1ab0c16cc 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2279,6 +2279,8 @@ static int mtk_stop(struct net_device *dev)
if (!refcount_dec_and_test(ð->dma_refcnt))
return 0;
+ mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
+
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
napi_disable(ð->tx_napi);
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index b16d8d9b196a..85830fe14a1b 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -85,6 +85,7 @@
#define MTK_GDMA_TCS_EN BIT(21)
#define MTK_GDMA_UCS_EN BIT(20)
#define MTK_GDMA_TO_PDMA 0x0
+#define MTK_GDMA_DROP_ALL 0x7777
/* Unicast Filter MAC Address Register - Low */
#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread