[RFC 0/7] ARM: dts: Mali for Realtek RTD1195/RTD1295

[RFC 0/7] ARM: dts: Mali for Realtek RTD1195/RTD1295

[Andreas Färber]

Hello,

This series adds the Mali GPU to Realtek RTD1195 and RTD1295 SoC DTs.

DT patches depend on RTD1295 clk series, to be resent; RTD1195 clk to be sent.
RTD1395 and RTD1619 DTs have not yet been prepared, only bindings while at it.

My testing was unsuccessful so far...

For RTD1195 I don't have a mali-supply yet, the bus clk was picked randomly
to make binding/driver happy, and the address/size is not clear.
For RTD1295 I don't have a bus clk specified; later patches add mali-supply
as G2227 PMIC's DCDC3 for Zidoo X9S.

RTD1295:

[    2.451713] panfrost 98050000.gpu: clock rate = 503929687
[    2.457326] panfrost 98050000.gpu: failed to get regulator: -517
[    2.463527] panfrost 98050000.gpu: regulator init failed -517
[    2.755320] panfrost 98050000.gpu: clock rate = 503929687
[    2.771280] panfrost 98050000.gpu: gpu soft reset timed out
[    2.777050] panfrost 98050000.gpu: Fatal error during GPU init
[    2.783236] panfrost: probe of 98050000.gpu failed with error -110

RTD1195 with 0x18030000:

[    3.722075] lima 18030000.gpu: IRQ pmu not found
[    3.727315] lima 18030000.gpu: mmu gpmmu dte write test fail
[    3.733237] lima: probe of 18030000.gpu failed with error -5

RTD1195 with 0x18003000:

[    3.722861] lima 18003000.gpu: IRQ pmu not found
[    3.728099] 8<--- cut here ---
[    3.731235] Unable to handle kernel paging request at virtual address f0879000
[    3.738685] pgd = (ptrval)
[    3.741461] [f0879000] *pgd=80000000107003, *pmd=2b008003, *pte=00000000
[    3.748396] Internal error: Oops: a07 [#1] PREEMPT SMP ARM
[    3.754019] Modules linked in:
[    3.757157] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.4.0-rc5-next-20191031+ #202
[    3.765000] Hardware name: Realtek RTD1195
[    3.769210] PC is at lima_mmu_init+0x2c/0x200
[    3.773678] LR is at lima_device_init+0x1e0/0x644
[    3.778498] pc : [<c0667f20>]    lr : [<c0667664>]    psr: 80000013
[    3.784919] sp : eb041db0  ip : eac00200  fp : 00000007
[    3.790274] r10: eb2c3088  r9 : eb2c3058  r8 : 00000001
[    3.795630] r7 : c101b650  r6 : c101b634  r5 : eb2c3040  r4 : eb2c3088
[    3.802318] r3 : f0879000  r2 : cafebabe  r1 : 0000001f  r0 : eb2c3088
[    3.809007] Flags: Nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
[    3.816320] Control: 30c5387d  Table: 00103000  DAC: fffffffd
[    3.822207] Process swapper/0 (pid: 1, stack limit = 0x(ptrval))
[    3.828361] Stack: (0xeb041db0 to 0xeb042000)
[    3.832832] 1da0:                                     00000001 c1003e50 eb175800 c06733d0
[    3.841215] 1dc0: 00000001 00000001 eb2c3040 c101b634 c101b650 00000001 eb2c3058 c0667664
[    3.849599] 1de0: eac152d0 c063df04 ea858800 00000000 c10700d0 eb2c3070 ea858800 eb175810
[    3.857981] 1e00: eb2c3040 ea858800 c1070158 00000000 c101b4f4 00000000 00000007 c066706c
[    3.866365] 1e20: 00000000 eb175810 c101b4f4 c0673868 eb175810 c1070154 00000000 c1070158
[    3.874750] 1e40: 00000000 c0671a64 eb175810 c101b4f4 c101b4f4 c101be00 c0e31834 c0e31854
[    3.883134] 1e60: 000000bc c0671d44 000000bc c0791fb4 c0a6affc eb175810 00000000 c101b4f4
[    3.891518] 1e80: c101be00 c0e31834 c0e31854 000000bc 00000007 c0671ff0 00000000 c101b4f4
[    3.899903] 1ea0: eb175810 c0672050 00000000 c101b4f4 c0671ff8 c066fdc4 00000007 eb035e58
[    3.908287] 1ec0: eb0d70b4 c1003e50 c101b4f4 ea85dc00 00000000 c0670e10 c0bf306c c0e1b4b0
[    3.916669] 1ee0: ffffe000 c101b4f4 c0e1b4b0 ffffe000 00000000 c06728b0 c1037700 c0e1b4b0
[    3.925053] 1f00: ffffe000 c0202770 000000bc c02595e8 00000000 c0c76b00 c0c080f0 c0e004a4
[    3.933437] 1f20: 00000000 00000006 00000006 c0bc22bc c0bb68d4 c0bb6888 00000000 ef5f5120
[    3.941822] 1f40: ef5f5127 c1003e50 cccccccd 00000006 c1037700 c1003e50 c0e004a4 c0e40568
[    3.950206] 1f60: c1037700 c1037700 c0e004a4 c0e00f24 00000006 00000006 00000000 c0e004a4
[    3.958590] 1f80: c092052c 00000000 c092052c 00000000 00000000 00000000 00000000 00000000
[    3.966972] 1fa0: 00000000 c0920534 00000000 c02011f8 00000000 00000000 00000000 00000000
[    3.975356] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    3.983739] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
[    3.992134] [<c0667f20>] (lima_mmu_init) from [<c0667664>] (lima_device_init+0x1e0/0x644)
[    4.000521] [<c0667664>] (lima_device_init) from [<c066706c>] (lima_pdev_probe+0x7c/0xc4)
[    4.008908] [<c066706c>] (lima_pdev_probe) from [<c0673868>] (platform_drv_probe+0x48/0x98)
[    4.017473] [<c0673868>] (platform_drv_probe) from [<c0671a64>] (really_probe+0x1e0/0x34c)
[    4.025949] [<c0671a64>] (really_probe) from [<c0671d44>] (driver_probe_device+0x60/0x16c)
[    4.034424] [<c0671d44>] (driver_probe_device) from [<c0671ff0>] (device_driver_attach+0x58/0x60)
[    4.043523] [<c0671ff0>] (device_driver_attach) from [<c0672050>] (__driver_attach+0x58/0xcc)
[    4.052264] [<c0672050>] (__driver_attach) from [<c066fdc4>] (bus_for_each_dev+0x78/0xc0)
[    4.060651] [<c066fdc4>] (bus_for_each_dev) from [<c0670e10>] (bus_add_driver+0x184/0x1dc)
[    4.069127] [<c0670e10>] (bus_add_driver) from [<c06728b0>] (driver_register+0x74/0x108)
[    4.077425] [<c06728b0>] (driver_register) from [<c0202770>] (do_one_initcall+0x58/0x1c4)
[    4.085814] [<c0202770>] (do_one_initcall) from [<c0e00f24>] (kernel_init_freeable+0x138/0x1d4)
[    4.094735] [<c0e00f24>] (kernel_init_freeable) from [<c0920534>] (kernel_init+0x8/0x110)
[    4.103122] [<c0920534>] (kernel_init) from [<c02011f8>] (ret_from_fork+0x14/0x3c)
[    4.110878] Exception stack(0xeb041fb0 to 0xeb041ff8)
[    4.116059] 1fa0:                                     00000000 00000000 00000000 00000000
[    4.124442] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    4.132823] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[    4.139607] Code: f57ff04e e30b2abe e590300c e34c2afe (e5832000) 
[    4.146186] ---[ end trace 26997bb6f978b400 ]---
[    4.150936] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
[    4.158791] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---

Latest experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next

Have a lot of fun!

Cheers,
Andreas

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>

Andreas Färber (7):
  dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML
  dt-bindings: gpu: mali-midgard: Add Realtek RTD1295
  arm64: dts: realtek: rtd1295: Add Mali node
  dt-bindings: gpu: mali-utgard: Add Realtek RTD1195
  ARM: dts: rtd1195: Add Mali node
  dt-bindings: gpu: mali-utgard: Add Realtek RTD1395
  dt-bindings: gpu: arm-bifrost: Add Realtek RTD1619

 .../devicetree/bindings/gpu/arm,mali-bifrost.yaml  |  1 +
 .../devicetree/bindings/gpu/arm,mali-midgard.yaml  | 33 ++++-----
 .../devicetree/bindings/gpu/arm,mali-utgard.yaml   |  5 ++
 arch/arm/boot/dts/rtd1195.dtsi                     | 19 +++++
 arch/arm64/boot/dts/realtek/rtd1295.dtsi           | 85 ++++++++++++++++++++++
 5 files changed, 125 insertions(+), 18 deletions(-)

-- 
2.16.4

[PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Andreas Färber]

Instead of grouping alphabetically by third-party vendor, leading to
one-element enums, sort by Mali model number, as done for Utgard.

This already allows us to de-duplicate two "arm,mali-t760" sections and
will make it easier to add new vendor compatibles.

Fixes: 553cedf60056 ("dt-bindings: Convert Arm Mali Midgard GPU to DT schema")
Fixes: 1be5b54d26ae ("dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible")
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 .../devicetree/bindings/gpu/arm,mali-midgard.yaml  | 32 ++++++++++------------
 1 file changed, 14 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 8e00a21b36f5..ffdb24c4ab6a 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -16,36 +16,32 @@ properties:
     oneOf:
       - items:
           - enum:
-             - allwinner,sun50i-h6-mali
-          - const: arm,mali-t720
-      - items:
-          - enum:
-             - amlogic,meson-gxm-mali
-          - const: arm,mali-t820
+             - samsung,exynos5250-mali
+          - const: arm,mali-t604
       - items:
           - enum:
              - arm,juno-mali
           - const: arm,mali-t624
+      # "arm,mali-t628"
       - items:
           - enum:
-             - rockchip,rk3288-mali
-          - const: arm,mali-t760
+             - allwinner,sun50i-h6-mali
+          - const: arm,mali-t720
       - items:
           - enum:
-             - rockchip,rk3399-mali
-          - const: arm,mali-t860
+             - rockchip,rk3288-mali
+             - samsung,exynos5433-mali
+          - const: arm,mali-t760
       - items:
           - enum:
-             - samsung,exynos5250-mali
-          - const: arm,mali-t604
+             - amlogic,meson-gxm-mali
+          - const: arm,mali-t820
+      # "arm,mali-t830"
       - items:
           - enum:
-             - samsung,exynos5433-mali
-          - const: arm,mali-t760
-
-          # "arm,mali-t628"
-          # "arm,mali-t830"
-          # "arm,mali-t880"
+             - rockchip,rk3399-mali
+          - const: arm,mali-t860
+      # "arm,mali-t880"
 
   reg:
     maxItems: 1
-- 
2.16.4

[PATCH 2/7] dt-bindings: gpu: mali-midgard: Add Realtek RTD1295

[Andreas Färber]

Define a compatible string for Realtek RTD1295 SoC family.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index ffdb24c4ab6a..f7e84d175dd2 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -35,6 +35,7 @@ properties:
       - items:
           - enum:
              - amlogic,meson-gxm-mali
+             - realtek,rtd1295-mali
           - const: arm,mali-t820
       # "arm,mali-t830"
       - items:
-- 
2.16.4

[RFC 3/7] arm64: dts: realtek: rtd1295: Add Mali node

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm64/boot/dts/realtek/rtd1295.dtsi | 85 ++++++++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)

diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
index 93f0e1d97721..61aa4f47c70b 100644
--- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -69,6 +69,91 @@
 			     <GIC_PPI 10
 			(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>;
 	};
+
+	mali_opp_table: gpu-opp-table {
+		compatible = "operating-points-v2";
+
+		opp@620000000 {
+			opp-hz = /bits/ 64 <620000000>;
+			opp-microvolt = <1100000>;
+		};
+
+		opp@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000>;
+		};
+
+		opp@580000000 {
+			opp-hz = /bits/ 64 <580000000>;
+			opp-microvolt = <1075000>;
+		};
+
+		opp@560000000 {
+			opp-hz = /bits/ 64 <560000000>;
+			opp-microvolt = <1075000>;
+		};
+
+		opp@540000000 {
+			opp-hz = /bits/ 64 <540000000>;
+			opp-microvolt = <1050000>;
+		};
+
+		opp@520000000 {
+			opp-hz = /bits/ 64 <520000000>;
+			opp-microvolt = <1025000>;
+		};
+
+		opp@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1000000>;
+		};
+
+		opp@460000000 {
+			opp-hz = /bits/ 64 <460000000>;
+			opp-microvolt = <1000000>;
+		};
+
+		opp@440000000 {
+			opp-hz = /bits/ 64 <440000000>;
+			opp-microvolt = <1000000>;
+		};
+
+		opp@400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1000000>;
+		};
+
+		opp@380000000 {
+			opp-hz = /bits/ 64 <380000000>;
+			opp-microvolt = <975000>;
+		};
+
+		opp@340000000 {
+			opp-hz = /bits/ 64 <340000000>;
+			opp-microvolt = <975000>;
+		};
+
+		opp@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <900000>;
+		};
+	};
+
+	soc {
+		mali: gpu@98050000 {
+			compatible = "realtek,rtd1295-mali", "arm,mali-t820";
+			reg = <0x98050000 0x10000>;
+			clocks = <&clkc RTD1295_CLK_EN_GPU>;
+			clock-names = "core";
+			resets = <&reset1 RTD1295_RSTN_GPU>;
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "job", "mmu", "gpu";
+			operating-points-v2 = <&mali_opp_table>;
+			#cooling-cells = <2>;
+		};
+	};
 };
 
 &arm_pmu {
-- 
2.16.4

[RFC 4/7] dt-bindings: gpu: mali-utgard: Add Realtek RTD1195

[Andreas Färber]

Define a compatible string for Realtek RTD1195 SoC family.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
index afde81be3c29..b01b95cf5cdf 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
@@ -26,6 +26,7 @@ properties:
               - allwinner,sun7i-a20-mali
               - allwinner,sun8i-h3-mali
               - allwinner,sun50i-a64-mali
+              - realtek,rtd1195-mali
               - rockchip,rk3036-mali
               - rockchip,rk3066-mali
               - rockchip,rk3188-mali
-- 
2.16.4

[RFC 5/7] ARM: dts: rtd1195: Add Mali node

[Andreas Färber]

Add a DT node for the Mali GPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm/boot/dts/rtd1195.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index 774f95d544a3..ae8843782cfa 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -292,6 +292,25 @@
 			status = "disabled";
 		};
 
+		/* TODO 0x18030000 0x10000 or 0x18003000 0x1000? */
+		mali: gpu@18030000 {
+			compatible = "realtek,rtd1195-mali", "arm,mali-400";
+			reg = <0x18030000 0x10000>;
+			/* TODO which bus clk to pass? */
+			clocks = <&clkc RTD1195_CLK_EN_GPU>, <&osc27M>;
+			clock-names = "core", "bus";
+			resets = <&reset1 RTD1195_RSTN_GPU>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "gp",  "gpmmu",
+					  "pp0", "ppmmu0",
+					  "pp1", "ppmmu1";
+		};
+
 		gic: interrupt-controller@ff011000 {
 			compatible = "arm,cortex-a7-gic";
 			reg = <0xff011000 0x1000>,
-- 
2.16.4

[RFC 6/7] dt-bindings: gpu: mali-utgard: Add Realtek RTD1395

[Andreas Färber]

Define compatible strings for Mali-470 and Realtek RTD1395 SoC family.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
index b01b95cf5cdf..62d5d3603c5d 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
@@ -44,6 +44,10 @@ properties:
               - hisilicon,hi6220-mali
               - rockchip,rk3328-mali
           - const: arm,mali-450
+      - items:
+          - enum:
+              - realtek,rtd1395-mali
+          - const: arm,mali-470
 
       # "arm,mali-300"
 
-- 
2.16.4

[PATCH 7/7] dt-bindings: gpu: arm-bifrost: Add Realtek RTD1619

[Andreas Färber]

Define a compatible string for Realtek RTD1619 SoC family.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index e50a0cc78fff..0c426e371e71 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -17,6 +17,7 @@ properties:
     items:
       - enum:
           - amlogic,meson-g12a-mali
+          - realtek,rtd1619-mali
       - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
 
   reg:
-- 
2.16.4

Re: [PATCH 7/7] dt-bindings: gpu: arm-bifrost: Add Realtek RTD1619

[Andreas Färber]

$subject: "mali-bifrost" obviously. Fixed on my branch.

Am 04.11.19 um 02:39 schrieb Andreas Färber:
> Define a compatible string for Realtek RTD1619 SoC family.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
>  1 file changed, 1 insertion(+)
[snip]

Regards,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Rob Herring]

On Sun, Nov 3, 2019 at 7:40 PM Andreas Färber <afaerber@suse.de> wrote:
>
> Instead of grouping alphabetically by third-party vendor, leading to
> one-element enums, sort by Mali model number, as done for Utgard.
>
> This already allows us to de-duplicate two "arm,mali-t760" sections and
> will make it easier to add new vendor compatibles.

That was the intent. Not sure how I messed that up...

This patch is problematic because there's changes in arm-soc juno/dt
branch and there's now a patch for exynos5420 (t628). I'd propose I
apply this such that we don't get a merge conflict with juno/dt and we
finish resorting after rc1 (or when both branches are in Linus' tree).

Rob

Re: [PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Krzysztof Kozlowski]

On Wed, 6 Nov 2019 at 15:25, Rob Herring <robh@kernel.org> wrote:
>
> On Sun, Nov 3, 2019 at 7:40 PM Andreas Färber <afaerber@suse.de> wrote:
> >
> > Instead of grouping alphabetically by third-party vendor, leading to
> > one-element enums, sort by Mali model number, as done for Utgard.
> >
> > This already allows us to de-duplicate two "arm,mali-t760" sections and
> > will make it easier to add new vendor compatibles.
>
> That was the intent. Not sure how I messed that up...
>
> This patch is problematic because there's changes in arm-soc juno/dt
> branch and there's now a patch for exynos5420 (t628). I'd propose I
> apply this such that we don't get a merge conflict with juno/dt and we
> finish resorting after rc1 (or when both branches are in Linus' tree).

After resubmit, you could take the exynos5420 bindings one (and I'll
take the DTS). However the submitter should base then on latest next,
assuming you'll apply this one.

Best regards,
Krzysztof

Re: [PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Andreas Färber]

Am Mittwoch, den 06.11.2019, 08:24 -0600 schrieb Rob Herring:
> On Sun, Nov 3, 2019 at 7:40 PM Andreas Färber <afaerber@suse.de>
> wrote:
> > Instead of grouping alphabetically by third-party vendor, leading
> > to
> > one-element enums, sort by Mali model number, as done for Utgard.
> > 
> > This already allows us to de-duplicate two "arm,mali-t760" sections
> > and
> > will make it easier to add new vendor compatibles.
> 
> That was the intent. Not sure how I messed that up...
> 
> This patch is problematic because there's changes in arm-soc juno/dt
> branch and there's now a patch for exynos5420 (t628). I'd propose I
> apply this such that we don't get a merge conflict with juno/dt and
> we
> finish resorting after rc1 (or when both branches are in Linus'
> tree).

This series has dependencies for the Realtek-side RFC patches and is
not yet ready to merge, so you can take this prep PATCH through your
tree for v5.6 probably, or feel free to rebase/rework as you see fit -
I'd just appreciate being credited at least via Reported-by. :)

Thanks,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Rob Herring]

On Wed, Nov 6, 2019 at 9:07 AM Andreas Färber <afaerber@suse.de> wrote:
>
> Am Mittwoch, den 06.11.2019, 08:24 -0600 schrieb Rob Herring:
> > On Sun, Nov 3, 2019 at 7:40 PM Andreas Färber <afaerber@suse.de>
> > wrote:
> > > Instead of grouping alphabetically by third-party vendor, leading
> > > to
> > > one-element enums, sort by Mali model number, as done for Utgard.
> > >
> > > This already allows us to de-duplicate two "arm,mali-t760" sections
> > > and
> > > will make it easier to add new vendor compatibles.
> >
> > That was the intent. Not sure how I messed that up...
> >
> > This patch is problematic because there's changes in arm-soc juno/dt
> > branch and there's now a patch for exynos5420 (t628). I'd propose I
> > apply this such that we don't get a merge conflict with juno/dt and
> > we
> > finish resorting after rc1 (or when both branches are in Linus'
> > tree).
>
> This series has dependencies for the Realtek-side RFC patches and is
> not yet ready to merge, so you can take this prep PATCH through your
> tree for v5.6 probably, or feel free to rebase/rework as you see fit -
> I'd just appreciate being credited at least via Reported-by. :)

I was assuming the non-RFC patches are good to go, so I was going to
pick up 1, 2, and 7.

Rob

Re: [PATCH 1/7] dt-bindings: gpu: mali-midgard: Tidy up conversion to YAML

[Andreas Färber]

Am 06.11.19 um 16:34 schrieb Rob Herring:
> On Wed, Nov 6, 2019 at 9:07 AM Andreas Färber <afaerber@suse.de> wrote:
>> Am Mittwoch, den 06.11.2019, 08:24 -0600 schrieb Rob Herring:
>>> This patch is problematic because there's changes in arm-soc juno/dt
>>> branch and there's now a patch for exynos5420 (t628). I'd propose I
>>> apply this such that we don't get a merge conflict with juno/dt and
>>> we
>>> finish resorting after rc1 (or when both branches are in Linus'
>>> tree).
>>
>> This series has dependencies for the Realtek-side RFC patches and is
>> not yet ready to merge, so you can take this prep PATCH through your
>> tree for v5.6 probably, or feel free to rebase/rework as you see fit -
>> I'd just appreciate being credited at least via Reported-by. :)
> 
> I was assuming the non-RFC patches are good to go, so I was going to
> pick up 1, 2, and 7.

Actually 1, 2 and 4 should be good to go; 7 if you fix the subject or if
I respin. Also 6 if you can have someone check that no new properties
will be needed for 470 (no Linux driver support yet).

All but 1 assuming you'll be okay to add SoC-specific restrictions on
clocks/resets/domains later, once we've fully figured it out (cf. cover
letter for current errors - looking into power domains next).

Regards,
Andreas

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Re: [PATCH 2/7] dt-bindings: gpu: mali-midgard: Add Realtek RTD1295

[Rob Herring]

On Mon,  4 Nov 2019 02:39:27 +0100, =?UTF-8?q?Andreas=20F=C3=A4rber?= wrote:
> Define a compatible string for Realtek RTD1295 SoC family.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Applied, thanks.

Rob

Re: [PATCH 7/7] dt-bindings: gpu: arm-bifrost: Add Realtek RTD1619

[Rob Herring]

On Mon,  4 Nov 2019 02:39:32 +0100, =?UTF-8?q?Andreas=20F=C3=A4rber?= wrote:
> Define a compatible string for Realtek RTD1619 SoC family.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Applied, thanks.

Rob