* [PATCH 1/4] soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface
2019-12-10 23:30 [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
@ 2019-12-10 23:30 ` Florian Fainelli
2019-12-10 23:30 ` [PATCH 2/4] soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216 Florian Fainelli
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2019-12-10 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Florian Fainelli, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
open list
7260A0 and B0 are both supported, and 7260A0 has a small difference in
that it does not support the write-back control register, which is why
we have a different array of registers. Update the comment above
b53_cpubiuctrl_no_wb_regs to denote that difference.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index d326915e0f40..6be975392590 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -63,7 +63,7 @@ static const int b15_cpubiuctrl_regs[] = {
[CPU_WRITEBACK_CTRL_REG] = -1,
};
-/* Odd cases, e.g: 7260 */
+/* Odd cases, e.g: 7260A0 */
static const int b53_cpubiuctrl_no_wb_regs[] = {
[CPU_CREDIT_REG] = 0x0b0,
[CPU_MCP_FLOW_REG] = 0x0b4,
@@ -102,6 +102,7 @@ static int __init mcp_write_pairing_set(void)
}
static const u32 b53_mach_compat[] = {
+ 0x7260,
0x7268,
0x7271,
0x7278,
@@ -157,6 +158,7 @@ static void __init mcp_b53_set(void)
static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
{
struct device_node *cpu_dn;
+ u32 family_id;
int ret = 0;
cpubiuctrl_base = of_iomap(np, 0);
@@ -185,7 +187,8 @@ static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
}
of_node_put(cpu_dn);
- if (BRCM_ID(brcmstb_get_family_id()) == 0x7260)
+ family_id = brcmstb_get_family_id();
+ if (BRCM_ID(family_id) == 0x7260 && BRCM_REV(family_id) == 0)
cpubiuctrl_regs = b53_cpubiuctrl_no_wb_regs;
out:
of_node_put(np);
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/4] soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
2019-12-10 23:30 [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
2019-12-10 23:30 ` [PATCH 1/4] soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface Florian Fainelli
@ 2019-12-10 23:30 ` Florian Fainelli
2019-12-10 23:30 ` [PATCH 3/4] soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211 Florian Fainelli
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2019-12-10 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Florian Fainelli, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
open list
7255 and 7216 are some of the latest chips that were produced and
support the full register range configuration for the BIU, add the two
entries to get the expected programming.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index 6be975392590..978cf52be664 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -102,6 +102,8 @@ static int __init mcp_write_pairing_set(void)
}
static const u32 b53_mach_compat[] = {
+ 0x7216,
+ 0x7255,
0x7260,
0x7268,
0x7271,
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 3/4] soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
2019-12-10 23:30 [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
2019-12-10 23:30 ` [PATCH 1/4] soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface Florian Fainelli
2019-12-10 23:30 ` [PATCH 2/4] soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216 Florian Fainelli
@ 2019-12-10 23:30 ` Florian Fainelli
2019-12-10 23:30 ` [PATCH 4/4] soc: bcm: brcmstb: biuctrl: Update programming for 7211 Florian Fainelli
2020-01-05 21:47 ` [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
4 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2019-12-10 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Florian Fainelli, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
open list
The BIUCTRL layout is a little different on 7211 which is equipped with
a Cortex-A72, account for those register offset differences. We will
match 7211 specifically in a subsequent commit.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index 978cf52be664..d766577bc5d4 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -76,6 +76,12 @@ static const int b53_cpubiuctrl_regs[] = {
[CPU_WRITEBACK_CTRL_REG] = 0x22c,
};
+static const int a72_cpubiuctrl_regs[] = {
+ [CPU_CREDIT_REG] = 0x18,
+ [CPU_MCP_FLOW_REG] = 0x1c,
+ [CPU_WRITEBACK_CTRL_REG] = 0x20,
+};
+
#define NUM_CPU_BIUCTRL_REGS 3
static int __init mcp_write_pairing_set(void)
@@ -183,6 +189,8 @@ static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
cpubiuctrl_regs = b15_cpubiuctrl_regs;
else if (of_device_is_compatible(cpu_dn, "brcm,brahma-b53"))
cpubiuctrl_regs = b53_cpubiuctrl_regs;
+ else if (of_device_is_compatible(cpu_dn, "arm,cortex-a72"))
+ cpubiuctrl_regs = a72_cpubiuctrl_regs;
else {
pr_err("unsupported CPU\n");
ret = -EINVAL;
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 4/4] soc: bcm: brcmstb: biuctrl: Update programming for 7211
2019-12-10 23:30 [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
` (2 preceding siblings ...)
2019-12-10 23:30 ` [PATCH 3/4] soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211 Florian Fainelli
@ 2019-12-10 23:30 ` Florian Fainelli
2020-01-05 21:47 ` [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
4 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2019-12-10 23:30 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Florian Fainelli, maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
open list
Add a matching entry for 7211 which can be programmed with the same
BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the
function to include a72 in the name to reflect this applies to both
types of 64-bit capable CPUs that we support (Brahma-B53 and
Cortex-A72).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/soc/bcm/brcmstb/biuctrl.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/bcm/brcmstb/biuctrl.c b/drivers/soc/bcm/brcmstb/biuctrl.c
index d766577bc5d4..61731e01f94b 100644
--- a/drivers/soc/bcm/brcmstb/biuctrl.c
+++ b/drivers/soc/bcm/brcmstb/biuctrl.c
@@ -107,7 +107,8 @@ static int __init mcp_write_pairing_set(void)
return 0;
}
-static const u32 b53_mach_compat[] = {
+static const u32 a72_b53_mach_compat[] = {
+ 0x7211,
0x7216,
0x7255,
0x7260,
@@ -116,19 +117,19 @@ static const u32 b53_mach_compat[] = {
0x7278,
};
-static void __init mcp_b53_set(void)
+static void __init mcp_a72_b53_set(void)
{
unsigned int i;
u32 reg;
reg = brcmstb_get_family_id();
- for (i = 0; i < ARRAY_SIZE(b53_mach_compat); i++) {
- if (BRCM_ID(reg) == b53_mach_compat[i])
+ for (i = 0; i < ARRAY_SIZE(a72_b53_mach_compat); i++) {
+ if (BRCM_ID(reg) == a72_b53_mach_compat[i])
break;
}
- if (i == ARRAY_SIZE(b53_mach_compat))
+ if (i == ARRAY_SIZE(a72_b53_mach_compat))
return;
/* Set all 3 MCP interfaces to 8 credits */
@@ -261,7 +262,7 @@ static int __init brcmstb_biuctrl_init(void)
return ret;
}
- mcp_b53_set();
+ mcp_a72_b53_set();
#ifdef CONFIG_PM_SLEEP
register_syscore_ops(&brcmstb_cpu_credit_syscore_ops);
#endif
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates
2019-12-10 23:30 [PATCH 0/4] soc: bcm: brcmstb: biuctrl updates Florian Fainelli
` (3 preceding siblings ...)
2019-12-10 23:30 ` [PATCH 4/4] soc: bcm: brcmstb: biuctrl: Update programming for 7211 Florian Fainelli
@ 2020-01-05 21:47 ` Florian Fainelli
4 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2020-01-05 21:47 UTC (permalink / raw)
To: Florian Fainelli, linux-arm-kernel
Cc: maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE, open list
On 12/10/2019 3:30 PM, Florian Fainelli wrote:
> Hi all,
>
> This patch series updates the Broadcom STB BIUCTRL register code to
> support the latest and greatest chips (7255, 7216, 7211) and also fixes
> the 7260A0 and B0 chips to use the correct tuning parameters.
>
> Florian Fainelli (4):
> soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface
> soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
> soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
> soc: bcm: brcmstb: biuctrl: Update programming for 7211
Series applied to drivers/next.
--
Florian
^ permalink raw reply [flat|nested] 6+ messages in thread