From: Joerg Roedel <joro@8bytes.org>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org
Subject: Re: [PATCH 0/2] iommu/amd: Fixes for x2APIC support
Date: Tue, 17 Dec 2019 10:34:27 +0100 [thread overview]
Message-ID: <20191217093427.GD8689@8bytes.org> (raw)
In-Reply-To: <1574258149-15602-1-git-send-email-suravee.suthikulpanit@amd.com>
On Wed, Nov 20, 2019 at 07:55:47AM -0600, Suravee Suthikulpanit wrote:
> Adding feature support check for MMIO access to MSI capability
> block registers when enabling x2APIC (XT) mode. Also fix up logic
> for checking XT feature support for IVHD type 10h.
>
> Suravee Suthikulpanit (2):
> iommu/amd: Check feature support bit before accessing MSI capability
> registers
> iommu/amd: Only support x2APIC with IVHD type 11h/40h
Applied both, thanks Suravee.
prev parent reply other threads:[~2019-12-17 9:34 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 13:55 [PATCH 0/2] iommu/amd: Fixes for x2APIC support Suravee Suthikulpanit
2019-11-20 13:55 ` [PATCH 1/2] iommu/amd: Check feature support bit before accessing MSI capability registers Suravee Suthikulpanit
2019-11-20 13:55 ` [PATCH 2/2] iommu/amd: Only support x2APIC with IVHD type 11h/40h Suravee Suthikulpanit
2019-12-17 9:34 ` Joerg Roedel [this message]
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