From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@linux.intel.com
Cc: acme@redhat.com, mingo@kernel.org, linux-kernel@vger.kernel.org,
tglx@linutronix.de, jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com
Subject: Re: [PATCH V5 RESEND 00/14] TopDown metrics support for Icelake
Date: Fri, 10 Jan 2020 14:17:49 +0100 [thread overview]
Message-ID: <20200110131749.GD2827@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200106202919.2943-1-kan.liang@linux.intel.com>
On Mon, Jan 06, 2020 at 12:29:05PM -0800, kan.liang@linux.intel.com wrote:
> From: Kan Liang <kan.liang@linux.intel.com>
>
> Icelake has support for measuring the level 1 TopDown metrics
> directly in hardware. This is implemented by an additional METRICS
> register, and a new Fixed Counter 3 that measures pipeline SLOTS.
>
> New in Icelake
> - Do not require generic counters. This allows to collect TopDown always
> in addition to other events.
> - Measuring TopDown per thread/process instead of only per core
>
> For the Ice Lake implementation of performance metrics, the values in
> PERF_METRICS MSR are derived from fixed counter 3. Software should start
> both registers, PERF_METRICS and fixed counter 3, from zero.
> Additionally, software is recommended to periodically clear both
> registers in order to maintain accurate measurements. The latter is
> required for certain scenarios that involve sampling metrics at high
> rates. Software should always write fixed counter 3 before write to
> PERF_METRICS.
Do we really have to support this trainwreck? This is such ill designed
hardware, I'm loath to support it, it might encourage more such
'creative' things and we really don't need that.
next prev parent reply other threads:[~2020-01-10 13:17 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-06 20:29 [PATCH V5 RESEND 00/14] TopDown metrics support for Icelake kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 01/14] perf/x86/intel: Introduce the fourth fixed counter kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 02/14] perf/x86/intel: Set correct mask for TOPDOWN.SLOTS kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 03/14] perf/x86/intel: Move BTS index to 47 kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 04/14] perf/x86/intel: Basic support for metrics counters kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 05/14] perf/x86/intel: Fix the name of perf capabilities for perf METRICS kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 06/14] perf/x86/intel: Support hardware TopDown metrics kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 07/14] perf/x86/intel: Support per thread RDPMC " kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 08/14] perf/x86/intel: Export TopDown events for Icelake kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 09/14] perf/x86/intel: Disable sampling read slots and topdown kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 10/14] perf/x86/intel: Name global status bit in NMI handler kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 11/14] perf/x86: Use event_base_rdpmc for RDPMC userspace support kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 12/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 13/14] perf, tools, stat: Check Topdown Metric group kan.liang
2020-01-06 20:29 ` [PATCH V5 RESEND 14/14] perf, tools: Add documentation for topdown metrics kan.liang
2020-01-10 13:17 ` Peter Zijlstra [this message]
2020-04-20 16:00 ` [PATCH V5 RESEND 00/14] TopDown metrics support for Icelake Stephane Eranian
2020-04-20 17:02 ` Peter Zijlstra
-- strict thread matches above, loose matches on Subject: below --
2019-12-03 14:11 kan.liang
2019-12-12 13:47 ` Liang, Kan
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