From: Peter Zijlstra <peterz@infradead.org>
To: Michal Simek <michal.simek@xilinx.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu, git@xilinx.com,
arnd@arndb.de, Allison Randal <allison@lohutok.net>,
Andrew Morton <akpm@linux-foundation.org>,
Boqun Feng <boqun.feng@gmail.com>,
Enrico Weigelt <info@metux.net>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Ingo Molnar <mingo@redhat.com>,
Kate Stewart <kstewart@linuxfoundation.org>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Mike Rapoport <rppt@linux.ibm.com>,
Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>,
Stefan Asserhall <stefan.asserhall@xilinx.com>,
Thomas Gleixner <tglx@linutronix.de>,
Will Deacon <will@kernel.org>
Subject: Re: [PATCH 0/7] microblaze: Define SMP safe operations
Date: Thu, 13 Feb 2020 09:11:39 +0100 [thread overview]
Message-ID: <20200213081139.GG14897@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <8dc57ea5-0868-0707-25a7-4cd6d8a43add@xilinx.com>
On Thu, Feb 13, 2020 at 08:49:40AM +0100, Michal Simek wrote:
> On 12. 02. 20 17:08, Peter Zijlstra wrote:
> > On Wed, Feb 12, 2020 at 04:42:22PM +0100, Michal Simek wrote:
> >
> >> Microblaze has 32bit exclusive load/store instructions which should be used
> >> instead of irq enable/disable. For more information take a look at
> >> https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug984-vivado-microblaze-ref.pdf
> >> starting from page 25.
> >
> >> arch/microblaze/include/asm/Kbuild | 1 -
> >> arch/microblaze/include/asm/atomic.h | 265 ++++++++++++++++++-
> >> arch/microblaze/include/asm/bitops.h | 189 +++++++++++++
> >> arch/microblaze/include/asm/cmpxchg.h | 87 ++++++
> >> arch/microblaze/include/asm/cpuinfo.h | 2 +-
> >> arch/microblaze/include/asm/pgtable.h | 19 +-
> >> arch/microblaze/include/asm/spinlock.h | 240 +++++++++++++++++
> >> arch/microblaze/include/asm/spinlock_types.h | 25 ++
> >> arch/microblaze/kernel/cpu/cache.c | 154 ++++++-----
> >> arch/microblaze/kernel/cpu/cpuinfo.c | 38 ++-
> >> arch/microblaze/kernel/cpu/mb.c | 207 ++++++++-------
> >> arch/microblaze/kernel/timer.c | 2 +-
> >> arch/microblaze/mm/consistent.c | 8 +-
> >> 13 files changed, 1040 insertions(+), 197 deletions(-)
> >> create mode 100644 arch/microblaze/include/asm/bitops.h
> >> create mode 100644 arch/microblaze/include/asm/spinlock.h
> >> create mode 100644 arch/microblaze/include/asm/spinlock_types.h
> >
> > I'm missing asm/barrier.h
>
> This has been sent in previous patchset. Link was in this email.
lkml.org link, please don't use them. The kernel.org links (example
below) have the Message-Id in them, which allows me to search for them
in my local storage without having to use a web browser.
You mean this one, right?
https://lkml.kernel.org/r/be707feb95d65b44435a0d9de946192f1fef30c6.1581497860.git.michal.simek@xilinx.com
So the PDF says this is a completion barrier, needed for DMA. This is a
very expensive option for smp_mb(), but if it is all you have and is
required, then yes, that should do.
next prev parent reply other threads:[~2020-02-13 8:11 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 15:42 [PATCH 0/7] microblaze: Define SMP safe operations Michal Simek
2020-02-12 15:42 ` [PATCH 1/7] microblaze: timer: Don't use cpu timer setting Michal Simek
2020-02-12 15:42 ` [PATCH 2/7] microblaze: Make cpuinfo structure SMP aware Michal Simek
2020-02-12 20:42 ` Arnd Bergmann
2020-02-12 15:42 ` [PATCH 3/7] microblaze: Define SMP safe bit operations Michal Simek
2020-02-12 15:53 ` Peter Zijlstra
2020-02-13 8:42 ` Michal Simek
2020-02-13 9:01 ` Stefan Asserhall
2020-02-13 9:11 ` Peter Zijlstra
2020-02-13 9:24 ` Stefan Asserhall
2020-02-12 15:42 ` [PATCH 4/7] microblaze: Add SMP implementation of xchg and cmpxchg Michal Simek
2020-02-12 15:42 ` [PATCH 5/7] microblaze: Remove disabling IRQ while pte_update() run Michal Simek
2020-02-12 15:42 ` [PATCH 6/7] microblaze: Implement architecture spinlock Michal Simek
2020-02-12 15:47 ` Peter Zijlstra
2020-02-13 7:51 ` Michal Simek
2020-02-13 8:00 ` Peter Zijlstra
2020-02-12 15:42 ` [PATCH 7/7] microblaze: Do atomic operations by using exclusive ops Michal Simek
2020-02-12 15:55 ` Peter Zijlstra
2020-02-13 8:06 ` Michal Simek
2020-02-13 8:58 ` Peter Zijlstra
2020-02-13 9:16 ` Peter Zijlstra
2020-02-13 10:04 ` Will Deacon
2020-02-13 10:14 ` Stefan Asserhall
2020-02-13 10:20 ` Will Deacon
2020-02-13 10:15 ` Peter Zijlstra
2020-02-13 11:34 ` Boqun Feng
2020-02-13 11:38 ` Boqun Feng
2020-02-13 13:51 ` Andrea Parri
2020-02-13 14:01 ` Andrea Parri
2020-02-12 16:08 ` [PATCH 0/7] microblaze: Define SMP safe operations Peter Zijlstra
2020-02-12 16:38 ` Peter Zijlstra
2020-02-13 7:49 ` Michal Simek
2020-02-13 8:11 ` Peter Zijlstra [this message]
2020-02-13 8:12 ` Michal Simek
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