[PATCH v2 1/2] x86: fix bitops.h warning with a moved cast

* [PATCH v2 1/2] x86: fix bitops.h warning with a moved cast
@ 2020-02-20 17:37 Jesse Brandeburg
  2020-02-20 17:37 ` [PATCH v2 2/2] lib: make a test module with set/clear bit Jesse Brandeburg
  2020-02-20 18:12 ` [PATCH v2 1/2] x86: fix bitops.h warning with a moved cast Peter Zijlstra
  0 siblings, 2 replies; 6+ messages in thread
From: Jesse Brandeburg @ 2020-02-20 17:37 UTC (permalink / raw)
  To: tglx, mingo, bp
  Cc: Jesse Brandeburg, x86, linux-kernel, linux, andriy.shevchenko,
	dan.j.williams

Fix many sparse warnings when building with C=1.

When the kernel is compiled with C=1, there are lots of messages like:
  arch/x86/include/asm/bitops.h:77:37: warning: cast truncates bits from constant value (ffffff7f becomes 7f)

CONST_MASK() is using a signed integer "1" to create the mask which
is later cast to (u8) when used. Move the cast to the definition so
and use local variables so sparse and the compiler can see the
correct type.

Verified with a test module (see next patch) and assembly inspection
that the patch doesn't introduce any change in generated code.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
---
v2: use correct CC: list
---
 arch/x86/include/asm/bitops.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 062cdecb2f24..2922b352b6ed 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -46,15 +46,17 @@
  * a mask operation on a byte.
  */
 #define CONST_MASK_ADDR(nr, addr)	WBYTE_ADDR((void *)(addr) + ((nr)>>3))
-#define CONST_MASK(nr)			(1 << ((nr) & 7))
+#define CONST_MASK(nr)			((u8)1 << ((nr) & 7))
 
 static __always_inline void
 arch_set_bit(long nr, volatile unsigned long *addr)
 {
 	if (__builtin_constant_p(nr)) {
+		u8 cmask = CONST_MASK(nr);
+
 		asm volatile(LOCK_PREFIX "orb %1,%0"
 			: CONST_MASK_ADDR(nr, addr)
-			: "iq" ((u8)CONST_MASK(nr))
+			: "iq" (cmask)
 			: "memory");
 	} else {
 		asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0"
@@ -72,9 +74,11 @@ static __always_inline void
 arch_clear_bit(long nr, volatile unsigned long *addr)
 {
 	if (__builtin_constant_p(nr)) {
+		u8 cmaski = ~CONST_MASK(nr);
+
 		asm volatile(LOCK_PREFIX "andb %1,%0"
 			: CONST_MASK_ADDR(nr, addr)
-			: "iq" ((u8)~CONST_MASK(nr)));
+			: "iq" (cmaski));
 	} else {
 		asm volatile(LOCK_PREFIX __ASM_SIZE(btr) " %1,%0"
 			: : RLONG_ADDR(addr), "Ir" (nr) : "memory");
-- 
2.24.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread