From: Feng Tang <feng.tang@intel.com>
To: "Kleen, Andi" <andi.kleen@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
"Chen, Rong A" <rong.a.chen@intel.com>,
Jiri Olsa <jolsa@redhat.com>, Ingo Molnar <mingo@kernel.org>,
Vince Weaver <vincent.weaver@maine.edu>,
Jiri Olsa <jolsa@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
"Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>,
Ravi Bangoria <ravi.bangoria@linux.ibm.com>,
Stephane Eranian <eranian@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
"lkp@lists.01.org" <lkp@lists.01.org>,
"Huang, Ying" <ying.huang@intel.com>
Subject: Re: [LKP] Re: [perf/x86] 81ec3f3c4c: will-it-scale.per_process_ops -5.5% regression
Date: Sat, 22 Feb 2020 20:43:59 +0800 [thread overview]
Message-ID: <20200222124359.GA86836@shbuild999.sh.intel.com> (raw)
In-Reply-To: <E8ECBC65D0B2554DAD44EBE43059B3740F1EAC@ORSMSX110.amr.corp.intel.com>
Hi Andi,
On Sat, Feb 22, 2020 at 02:05:02AM +0800, Kleen, Andi wrote:
>
>
> >So likely, this commit changes the layout of the kernel text
> >and data,
>
> It should be only data here. text changes all the time anyways,
> but data tends to be more stable.
Yes, I also did en experiment by modifying the gcc option to let
all functions address aligned to 32 or 64, and the 5.5% gap still
exist for the 2 commmits.
> > which may trigger some cacheline level change. From
> >the system map of the 2 kernels, a big trunk of symbol's address
> >changes which follow the global "pmu",
>
> I wonder if it's the effect Andrew predicted a long time ago from
> using __read_mostly. If all the __read_mostlies are moved somewhere
> else the remaining read/write variables will get more sensitive to false sharing.
>
> A simple experiment would be to add a __cacheline_aligned to align it,
> and then add
>
> ____cacheline_aligned char dummy[0];
>
> at the end to pad it to 64bytes.
Thanks for the suggestion, I tried this and the 5.5 regrssion is gone!
which also confirms the offset for the bulk of stuff following "pmu"
causes the performance drop.
>
> Or hopefully Jiri can figure it out from the C2C data.
I'm also trying to debug following Jiri's "perf c2c" suggestion.
Thanks,
Feng
next prev parent reply other threads:[~2020-02-22 12:44 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-05 12:32 [perf/x86] 81ec3f3c4c: will-it-scale.per_process_ops -5.5% regression kernel test robot
2020-02-05 12:58 ` Peter Zijlstra
2020-02-06 3:04 ` [LKP] " Li, Philip
2020-02-21 8:03 ` Feng Tang
2020-02-21 10:58 ` Peter Zijlstra
2020-02-21 13:20 ` Jiri Olsa
2020-02-23 14:11 ` Feng Tang
2020-02-23 17:37 ` Linus Torvalds
2020-02-24 0:33 ` Feng Tang
2020-02-24 1:06 ` Linus Torvalds
2020-02-24 1:58 ` Huang, Ying
2020-02-24 2:19 ` Feng Tang
2020-02-24 13:20 ` Feng Tang
2020-02-24 19:24 ` Linus Torvalds
2020-02-24 19:42 ` Kleen, Andi
2020-02-24 20:09 ` Linus Torvalds
2020-02-24 20:47 ` Linus Torvalds
2020-02-24 21:20 ` Eric W. Biederman
2020-02-24 21:43 ` Linus Torvalds
2020-02-24 21:59 ` Eric W. Biederman
2020-02-24 22:12 ` Linus Torvalds
2020-02-25 2:57 ` Feng Tang
2020-02-25 3:15 ` Linus Torvalds
2020-02-25 4:53 ` Feng Tang
2020-02-23 19:36 ` Jiri Olsa
2020-02-21 18:05 ` Kleen, Andi
2020-02-22 12:43 ` Feng Tang [this message]
2020-02-22 17:08 ` Kleen, Andi
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