* [PATCH v3 1/5] arm: dts: calxeda: Basic DT file fixes
2020-02-28 13:51 [PATCH v3 0/5] arm: calxeda: update DTS and MAINTAINERS Andre Przywara
@ 2020-02-28 13:51 ` Andre Przywara
2020-02-28 13:51 ` [PATCH v3 2/5] arm: dts: calxeda: Provide UART clock Andre Przywara
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2020-02-28 13:51 UTC (permalink / raw)
To: soc, Olof Johansson, Arnd Bergmann
Cc: Rob Herring, linux-arm-kernel, linux-kernel, devicetree,
Maxime Ripard, Robert Richter, Jon Loeliger, Mark Langsdorf,
Eric Auger, Will Deacon, Catalin Marinas
The .dts files for the Calxeda machines are quite old, so carry some
sloppy mistakes that the DT schema checker will complain about.
Fix those issues, they should not have any effect on functionality.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
arch/arm/boot/dts/ecx-2000.dts | 4 +---
arch/arm/boot/dts/highbank.dts | 7 ++-----
2 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 5651ae6dc969..8e0489607704 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -13,7 +13,6 @@
compatible = "calxeda,ecx-2000";
#address-cells = <2>;
#size-cells = <2>;
- clock-ranges;
cpus {
#address-cells = <1>;
@@ -83,8 +82,7 @@
intc: interrupt-controller@fff11000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
- #size-cells = <0>;
- #address-cells = <1>;
+ #address-cells = <0>;
interrupt-controller;
interrupts = <1 9 0xf04>;
reg = <0xfff11000 0x1000>,
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index f4e4dca6f7e7..9e34d1bd7994 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -13,7 +13,6 @@
compatible = "calxeda,highbank";
#address-cells = <1>;
#size-cells = <1>;
- clock-ranges;
cpus {
#address-cells = <1>;
@@ -96,7 +95,7 @@
};
};
- memory {
+ memory@0 {
name = "memory";
device_type = "memory";
reg = <0x00000000 0xff900000>;
@@ -128,14 +127,12 @@
intc: interrupt-controller@fff11000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
- #size-cells = <0>;
- #address-cells = <1>;
interrupt-controller;
reg = <0xfff11000 0x1000>,
<0xfff10100 0x100>;
};
- L2: l2-cache {
+ L2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0xfff12000 0x1000>;
interrupts = <0 70 4>;
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 2/5] arm: dts: calxeda: Provide UART clock
2020-02-28 13:51 [PATCH v3 0/5] arm: calxeda: update DTS and MAINTAINERS Andre Przywara
2020-02-28 13:51 ` [PATCH v3 1/5] arm: dts: calxeda: Basic DT file fixes Andre Przywara
@ 2020-02-28 13:51 ` Andre Przywara
2020-02-28 13:51 ` [PATCH v3 3/5] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2020-02-28 13:51 UTC (permalink / raw)
To: soc, Olof Johansson, Arnd Bergmann
Cc: Rob Herring, linux-arm-kernel, linux-kernel, devicetree,
Maxime Ripard, Robert Richter, Jon Loeliger, Mark Langsdorf,
Eric Auger, Will Deacon, Catalin Marinas
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
arch/arm/boot/dts/ecx-common.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
index 66ee1d34f72b..f819e3328a9e 100644
--- a/arch/arm/boot/dts/ecx-common.dtsi
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -114,8 +114,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfff36000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&pclk>;
- clock-names = "apb_pclk";
+ clocks = <&pclk>, <&pclk>;
+ clock-names = "uartclk", "apb_pclk";
};
smic@fff3a000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 3/5] arm: dts: calxeda: Fix interrupt grouping
2020-02-28 13:51 [PATCH v3 0/5] arm: calxeda: update DTS and MAINTAINERS Andre Przywara
2020-02-28 13:51 ` [PATCH v3 1/5] arm: dts: calxeda: Basic DT file fixes Andre Przywara
2020-02-28 13:51 ` [PATCH v3 2/5] arm: dts: calxeda: Provide UART clock Andre Przywara
@ 2020-02-28 13:51 ` Andre Przywara
2020-02-28 13:51 ` [PATCH v3 4/5] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
2020-02-28 13:51 ` [PATCH v3 5/5] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
4 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2020-02-28 13:51 UTC (permalink / raw)
To: soc, Olof Johansson, Arnd Bergmann
Cc: Rob Herring, linux-arm-kernel, linux-kernel, devicetree,
Maxime Ripard, Robert Richter, Jon Loeliger, Mark Langsdorf,
Eric Auger, Will Deacon, Catalin Marinas
Currently multiple interrupts for some devices are written as one array
instead of using the DT grouping notation (<0 42 4>, <0 23 4>).
This ends up in the same binary representation in the .dtb, but is
semantically not equivalent. The yaml schema checks will stumble over
this, so lets fix that first.
I refrained from using the symbolic names for GIC_SPI/GIC_PPI and
IRQ_TYPE_LEVEL_HIGH, mostly because it increases the delta between the
original DTS files and the mainline versions, so it's just additional
churn.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
arch/arm/boot/dts/ecx-2000.dts | 2 +-
arch/arm/boot/dts/ecx-common.dtsi | 4 ++--
arch/arm/boot/dts/highbank.dts | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 8e0489607704..f6eb71553b95 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -93,7 +93,7 @@
pmu {
compatible = "arm,cortex-a9-pmu";
- interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
+ interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>;
};
};
};
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
index f819e3328a9e..b7e74a357471 100644
--- a/arch/arm/boot/dts/ecx-common.dtsi
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -202,14 +202,14 @@
ethernet@fff50000 {
compatible = "calxeda,hb-xgmac";
reg = <0xfff50000 0x1000>;
- interrupts = <0 77 4 0 78 4 0 79 4>;
+ interrupts = <0 77 4>, <0 78 4>, <0 79 4>;
dma-coherent;
};
ethernet@fff51000 {
compatible = "calxeda,hb-xgmac";
reg = <0xfff51000 0x1000>;
- interrupts = <0 80 4 0 81 4 0 82 4>;
+ interrupts = <0 80 4>, <0 81 4>, <0 82 4>;
dma-coherent;
};
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 9e34d1bd7994..b6b0225a769e 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -142,14 +142,14 @@
pmu {
compatible = "arm,cortex-a9-pmu";
- interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
+ interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>;
};
sregs@fff3c200 {
compatible = "calxeda,hb-sregs-l2-ecc";
reg = <0xfff3c200 0x100>;
- interrupts = <0 71 4 0 72 4>;
+ interrupts = <0 71 4>, <0 72 4>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 4/5] arm: dts: calxeda: Group port-phys and sgpio-gpio items
2020-02-28 13:51 [PATCH v3 0/5] arm: calxeda: update DTS and MAINTAINERS Andre Przywara
` (2 preceding siblings ...)
2020-02-28 13:51 ` [PATCH v3 3/5] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
@ 2020-02-28 13:51 ` Andre Przywara
2020-02-28 13:51 ` [PATCH v3 5/5] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
4 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2020-02-28 13:51 UTC (permalink / raw)
To: soc, Olof Johansson, Arnd Bergmann
Cc: Rob Herring, linux-arm-kernel, linux-kernel, devicetree,
Maxime Ripard, Robert Richter, Jon Loeliger, Mark Langsdorf,
Eric Auger, Will Deacon, Catalin Marinas
For proper bindings checks we need to properly group the port-phys and
sgpio-gpio items, so that they match the expected number of items.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
arch/arm/boot/dts/ecx-common.dtsi | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
index b7e74a357471..57a028a69373 100644
--- a/arch/arm/boot/dts/ecx-common.dtsi
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -27,10 +27,11 @@
reg = <0xffe08000 0x10000>;
interrupts = <0 83 4>;
dma-coherent;
- calxeda,port-phys = <&combophy5 0 &combophy0 0
- &combophy0 1 &combophy0 2
- &combophy0 3>;
- calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
+ calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
+ <&combophy0 1>, <&combophy0 2>,
+ <&combophy0 3>;
+ calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>,
+ <&gpioh 7 1>;
calxeda,led-order = <4 0 1 2 3>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 5/5] MAINTAINERS: Update Calxeda Highbank maintainership
2020-02-28 13:51 [PATCH v3 0/5] arm: calxeda: update DTS and MAINTAINERS Andre Przywara
` (3 preceding siblings ...)
2020-02-28 13:51 ` [PATCH v3 4/5] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
@ 2020-02-28 13:51 ` Andre Przywara
4 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2020-02-28 13:51 UTC (permalink / raw)
To: soc, Olof Johansson, Arnd Bergmann
Cc: Rob Herring, linux-arm-kernel, linux-kernel, devicetree,
Maxime Ripard, Robert Richter, Jon Loeliger, Mark Langsdorf,
Eric Auger, Will Deacon, Catalin Marinas
Rob sees little point in maintaining the Calxeda architecture (early ARM
32-bit server) anymore.
Since I have a machine sitting under my desk, change the maintainership
to not lose support for that platform.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 05f566eba2a6..fc1a11f10736 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1605,7 +1605,7 @@ F: Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml
F: Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt
ARM/CALXEDA HIGHBANK ARCHITECTURE
-M: Rob Herring <robh@kernel.org>
+M: Andre Przywara <andre.przywara@arm.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-highbank/
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread