* [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN
@ 2020-02-26 9:13 Anson Huang
2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Anson Huang @ 2020-02-26 9:13 UTC (permalink / raw)
To: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel,
festevam, devicetree, linux-arm-kernel, linux-kernel
Cc: Linux-imx
i.MX8MN can reuse i.MX8MQ's reset driver, update the compatible
property and related info to support i.MX8MN.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
.../devicetree/bindings/reset/fsl,imx7-src.txt | 4 +-
include/dt-bindings/reset/imx8mq-reset.h | 56 +++++++++++-----------
2 files changed, 31 insertions(+), 29 deletions(-)
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
index c2489e4..38ac251 100644
--- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
+++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
@@ -9,6 +9,7 @@ Required properties:
- For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
- For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
- For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"
+ - For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon"
- reg: should be register base and length as documented in the
datasheet
- interrupts: Should contain SRC interrupt
@@ -49,4 +50,5 @@ Example:
For list of all valid reset indices see
<dt-bindings/reset/imx7-reset.h> for i.MX7,
<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MM
+<dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and
+<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN
diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
index 9a30108..a5b5707 100644
--- a/include/dt-bindings/reset/imx8mq-reset.h
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -28,36 +28,36 @@
#define IMX8MQ_RESET_A53_L2RESET 17
#define IMX8MQ_RESET_SW_NON_SCLR_M4C_RST 18
#define IMX8MQ_RESET_OTG1_PHY_RESET 19
-#define IMX8MQ_RESET_OTG2_PHY_RESET 20
-#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
-#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
-#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23
-#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24
-#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25
-#define IMX8MQ_RESET_PCIEPHY 26
-#define IMX8MQ_RESET_PCIEPHY_PERST 27
-#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
-#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29
-#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_OTG2_PHY_RESET 20 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIEPHY 26 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIEPHY_PERST 27 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM/i.MX8MN does NOT support */
#define IMX8MQ_RESET_DISP_RESET 31
#define IMX8MQ_RESET_GPU_RESET 32
-#define IMX8MQ_RESET_VPU_RESET 33
-#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_DDRC1_PRST 44
-#define IMX8MQ_RESET_DDRC1_CORE_RESET 45
-#define IMX8MQ_RESET_DDRC1_PHY_RESET 46
-#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM does NOT support */
-#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM does NOT support */
+#define IMX8MQ_RESET_VPU_RESET 33 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC1_PRST 44 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC1_CORE_RESET 45 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC1_PHY_RESET 46 /* i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM/i.MX8MN does NOT support */
+#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM/i.MX8MN does NOT support */
#define IMX8MQ_RESET_NUM 50
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC 2020-02-26 9:13 [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Anson Huang @ 2020-02-26 9:13 ` Anson Huang 2020-03-03 14:08 ` Rob Herring 2020-03-04 9:15 ` Philipp Zabel 2020-02-26 9:13 ` [PATCH 3/4] arm64: dts: imx8mp: Add src node Anson Huang ` (2 subsequent siblings) 3 siblings, 2 replies; 8+ messages in thread From: Anson Huang @ 2020-02-26 9:13 UTC (permalink / raw) To: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel Cc: Linux-imx The driver now supports i.MX8MP, so update bindings accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- .../devicetree/bindings/reset/fsl,imx7-src.txt | 4 +- include/dt-bindings/reset/imx8mp-reset.h | 50 ++++++++++++++++++++++ 2 files changed, 53 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/reset/imx8mp-reset.h diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt index 38ac251..e10502d 100644 --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt @@ -10,6 +10,7 @@ Required properties: - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon" - For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon" - For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon" + - For i.MX8MP SoCs should be "fsl,imx8mp-src", "syscon" - reg: should be register base and length as documented in the datasheet - interrupts: Should contain SRC interrupt @@ -51,4 +52,5 @@ For list of all valid reset indices see <dt-bindings/reset/imx7-reset.h> for i.MX7, <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and <dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and -<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN +<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and +<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h new file mode 100644 index 0000000..ee37769 --- /dev/null +++ b/include/dt-bindings/reset/imx8mp-reset.h @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2020 NXP + */ + +#ifndef DT_BINDING_RESET_IMX8MP_H +#define DT_BINDING_RESET_IMX8MP_H + +#define IMX8MP_RESET_A53_CORE_POR_RESET0 0 +#define IMX8MP_RESET_A53_CORE_POR_RESET1 1 +#define IMX8MP_RESET_A53_CORE_POR_RESET2 2 +#define IMX8MP_RESET_A53_CORE_POR_RESET3 3 +#define IMX8MP_RESET_A53_CORE_RESET0 4 +#define IMX8MP_RESET_A53_CORE_RESET1 5 +#define IMX8MP_RESET_A53_CORE_RESET2 6 +#define IMX8MP_RESET_A53_CORE_RESET3 7 +#define IMX8MP_RESET_A53_DBG_RESET0 8 +#define IMX8MP_RESET_A53_DBG_RESET1 9 +#define IMX8MP_RESET_A53_DBG_RESET2 10 +#define IMX8MP_RESET_A53_DBG_RESET3 11 +#define IMX8MP_RESET_A53_ETM_RESET0 12 +#define IMX8MP_RESET_A53_ETM_RESET1 13 +#define IMX8MP_RESET_A53_ETM_RESET2 14 +#define IMX8MP_RESET_A53_ETM_RESET3 15 +#define IMX8MP_RESET_A53_SOC_DBG_RESET 16 +#define IMX8MP_RESET_A53_L2RESET 17 +#define IMX8MP_RESET_SW_NON_SCLR_M7C_RST 18 +#define IMX8MP_RESET_OTG1_PHY_RESET 19 +#define IMX8MP_RESET_OTG2_PHY_RESET 20 +#define IMX8MP_RESET_SUPERMIX_RESET 21 +#define IMX8MP_RESET_AUDIOMIX_RESET 22 +#define IMX8MP_RESET_MLMIX_RESET 23 +#define IMX8MP_RESET_PCIEPHY 24 +#define IMX8MP_RESET_PCIEPHY_PERST 25 +#define IMX8MP_RESET_PCIE_CTRL_APPS_EN 26 +#define IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF 27 +#define IMX8MP_RESET_HDMI_PHY_APB_RESET 28 +#define IMX8MP_RESET_MEDIA_RESET 29 +#define IMX8MP_RESET_GPU2D_RESET 30 +#define IMX8MP_RESET_GPU3D_RESET 31 +#define IMX8MP_RESET_GPU_RESET 32 +#define IMX8MP_RESET_VPU_RESET 33 +#define IMX8MP_RESET_VPU_G1_RESET 34 +#define IMX8MP_RESET_VPU_G2_RESET 35 +#define IMX8MP_RESET_VPUVC8KE_RESET 36 +#define IMX8MP_RESET_NOC_RESET 37 + +#define IMX8MP_RESET_NUM 38 + +#endif -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC 2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang @ 2020-03-03 14:08 ` Rob Herring 2020-03-04 9:15 ` Philipp Zabel 1 sibling, 0 replies; 8+ messages in thread From: Rob Herring @ 2020-03-03 14:08 UTC (permalink / raw) To: Anson Huang Cc: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel, Linux-imx On Wed, 26 Feb 2020 17:13:49 +0800, Anson Huang wrote: > The driver now supports i.MX8MP, so update bindings accordingly. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > .../devicetree/bindings/reset/fsl,imx7-src.txt | 4 +- > include/dt-bindings/reset/imx8mp-reset.h | 50 ++++++++++++++++++++++ > 2 files changed, 53 insertions(+), 1 deletion(-) > create mode 100644 include/dt-bindings/reset/imx8mp-reset.h > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC 2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang 2020-03-03 14:08 ` Rob Herring @ 2020-03-04 9:15 ` Philipp Zabel 1 sibling, 0 replies; 8+ messages in thread From: Philipp Zabel @ 2020-03-04 9:15 UTC (permalink / raw) To: Anson Huang, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel Cc: Linux-imx Hi Anson, On Wed, 2020-02-26 at 17:13 +0800, Anson Huang wrote: > The driver now supports i.MX8MP, so update bindings accordingly. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > .../devicetree/bindings/reset/fsl,imx7-src.txt | 4 +- > include/dt-bindings/reset/imx8mp-reset.h | 50 ++++++++++++++++++++++ > 2 files changed, 53 insertions(+), 1 deletion(-) > create mode 100644 include/dt-bindings/reset/imx8mp-reset.h > > diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt > index 38ac251..e10502d 100644 > --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt > +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt > @@ -10,6 +10,7 @@ Required properties: > - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon" > - For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon" > - For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon" > + - For i.MX8MP SoCs should be "fsl,imx8mp-src", "syscon" > - reg: should be register base and length as documented in the > datasheet > - interrupts: Should contain SRC interrupt > @@ -51,4 +52,5 @@ For list of all valid reset indices see > <dt-bindings/reset/imx7-reset.h> for i.MX7, > <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and > <dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and > -<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN > +<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and > +<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP > diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h > new file mode 100644 > index 0000000..ee37769 > --- /dev/null > +++ b/include/dt-bindings/reset/imx8mp-reset.h > @@ -0,0 +1,50 @@ > +// SPDX-License-Identifier: GPL-2.0-only Thank you, I've changed this to /* SPDX-License-Identifier: GPL-2.0-only */ and applied patches 1, 2, and 4. regards Philipp ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] arm64: dts: imx8mp: Add src node 2020-02-26 9:13 [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Anson Huang 2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang @ 2020-02-26 9:13 ` Anson Huang 2020-03-11 7:24 ` Shawn Guo 2020-02-26 9:13 ` [PATCH 4/4] reset: imx7: Add support for i.MX8MP SoC Anson Huang 2020-03-03 14:07 ` [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Rob Herring 3 siblings, 1 reply; 8+ messages in thread From: Anson Huang @ 2020-02-26 9:13 UTC (permalink / raw) To: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel Cc: Linux-imx Add src node to support i.MX8MP reset controller. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 71b0c8f..a253c3f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -306,6 +306,12 @@ <393216000>, <361267200>; }; + + src: reset-controller@30390000 { + compatible = "fsl,imx8mp-src", "syscon"; + reg = <0x30390000 0x10000>; + #reset-cells = <1>; + }; }; aips2: bus@30400000 { -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/4] arm64: dts: imx8mp: Add src node 2020-02-26 9:13 ` [PATCH 3/4] arm64: dts: imx8mp: Add src node Anson Huang @ 2020-03-11 7:24 ` Shawn Guo 0 siblings, 0 replies; 8+ messages in thread From: Shawn Guo @ 2020-03-11 7:24 UTC (permalink / raw) To: Anson Huang Cc: p.zabel, robh+dt, mark.rutland, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel, Linux-imx On Wed, Feb 26, 2020 at 05:13:50PM +0800, Anson Huang wrote: > Add src node to support i.MX8MP reset controller. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Applied, thanks. ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/4] reset: imx7: Add support for i.MX8MP SoC 2020-02-26 9:13 [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Anson Huang 2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang 2020-02-26 9:13 ` [PATCH 3/4] arm64: dts: imx8mp: Add src node Anson Huang @ 2020-02-26 9:13 ` Anson Huang 2020-03-03 14:07 ` [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Rob Herring 3 siblings, 0 replies; 8+ messages in thread From: Anson Huang @ 2020-02-26 9:13 UTC (permalink / raw) To: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel Cc: Linux-imx i.MX8MP is a new SoC of i.MX8M family, it has same src IP inside but with different module layout, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- drivers/reset/reset-imx7.c | 101 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 1443a55..d170fe6 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -15,6 +15,7 @@ #include <linux/regmap.h> #include <dt-bindings/reset/imx7-reset.h> #include <dt-bindings/reset/imx8mq-reset.h> +#include <dt-bindings/reset/imx8mp-reset.h> struct imx7_src_signal { unsigned int offset, bit; @@ -145,6 +146,18 @@ enum imx8mq_src_registers { SRC_DDRC2_RCR = 0x1004, }; +enum imx8mp_src_registers { + SRC_SUPERMIX_RCR = 0x0018, + SRC_AUDIOMIX_RCR = 0x001c, + SRC_MLMIX_RCR = 0x0028, + SRC_GPU2D_RCR = 0x0038, + SRC_GPU3D_RCR = 0x003c, + SRC_VPU_G1_RCR = 0x0048, + SRC_VPU_G2_RCR = 0x004c, + SRC_VPUVC8KE_RCR = 0x0050, + SRC_NOC_RCR = 0x0054, +}; + static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { [IMX8MQ_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) }, [IMX8MQ_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) }, @@ -253,6 +266,93 @@ static const struct imx7_src_variant variant_imx8mq = { }, }; +static const struct imx7_src_signal imx8mp_src_signals[IMX8MP_RESET_NUM] = { + [IMX8MP_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) }, + [IMX8MP_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) }, + [IMX8MP_RESET_A53_CORE_POR_RESET2] = { SRC_A53RCR0, BIT(2) }, + [IMX8MP_RESET_A53_CORE_POR_RESET3] = { SRC_A53RCR0, BIT(3) }, + [IMX8MP_RESET_A53_CORE_RESET0] = { SRC_A53RCR0, BIT(4) }, + [IMX8MP_RESET_A53_CORE_RESET1] = { SRC_A53RCR0, BIT(5) }, + [IMX8MP_RESET_A53_CORE_RESET2] = { SRC_A53RCR0, BIT(6) }, + [IMX8MP_RESET_A53_CORE_RESET3] = { SRC_A53RCR0, BIT(7) }, + [IMX8MP_RESET_A53_DBG_RESET0] = { SRC_A53RCR0, BIT(8) }, + [IMX8MP_RESET_A53_DBG_RESET1] = { SRC_A53RCR0, BIT(9) }, + [IMX8MP_RESET_A53_DBG_RESET2] = { SRC_A53RCR0, BIT(10) }, + [IMX8MP_RESET_A53_DBG_RESET3] = { SRC_A53RCR0, BIT(11) }, + [IMX8MP_RESET_A53_ETM_RESET0] = { SRC_A53RCR0, BIT(12) }, + [IMX8MP_RESET_A53_ETM_RESET1] = { SRC_A53RCR0, BIT(13) }, + [IMX8MP_RESET_A53_ETM_RESET2] = { SRC_A53RCR0, BIT(14) }, + [IMX8MP_RESET_A53_ETM_RESET3] = { SRC_A53RCR0, BIT(15) }, + [IMX8MP_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) }, + [IMX8MP_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) }, + [IMX8MP_RESET_SW_NON_SCLR_M7C_RST] = { SRC_M4RCR, BIT(0) }, + [IMX8MP_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) }, + [IMX8MP_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) }, + [IMX8MP_RESET_SUPERMIX_RESET] = { SRC_SUPERMIX_RCR, BIT(0) }, + [IMX8MP_RESET_AUDIOMIX_RESET] = { SRC_AUDIOMIX_RCR, BIT(0) }, + [IMX8MP_RESET_MLMIX_RESET] = { SRC_MLMIX_RCR, BIT(0) }, + [IMX8MP_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) }, + [IMX8MP_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, + [IMX8MP_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, + [IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) }, + [IMX8MP_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) }, + [IMX8MP_RESET_MEDIA_RESET] = { SRC_DISP_RCR, BIT(0) }, + [IMX8MP_RESET_GPU2D_RESET] = { SRC_GPU2D_RCR, BIT(0) }, + [IMX8MP_RESET_GPU3D_RESET] = { SRC_GPU3D_RCR, BIT(0) }, + [IMX8MP_RESET_GPU_RESET] = { SRC_GPU_RCR, BIT(0) }, + [IMX8MP_RESET_VPU_RESET] = { SRC_VPU_RCR, BIT(0) }, + [IMX8MP_RESET_VPU_G1_RESET] = { SRC_VPU_G1_RCR, BIT(0) }, + [IMX8MP_RESET_VPU_G2_RESET] = { SRC_VPU_G2_RCR, BIT(0) }, + [IMX8MP_RESET_VPUVC8KE_RESET] = { SRC_VPUVC8KE_RCR, BIT(0) }, + [IMX8MP_RESET_NOC_RESET] = { SRC_NOC_RCR, BIT(0) }, +}; + +static int imx8mp_reset_set(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct imx7_src *imx7src = to_imx7_src(rcdev); + const unsigned int bit = imx7src->signals[id].bit; + unsigned int value = assert ? bit : 0; + + switch (id) { + case IMX8MP_RESET_PCIEPHY: + /* + * wait for more than 10us to release phy g_rst and + * btnrst + */ + if (!assert) + udelay(10); + break; + + case IMX8MP_RESET_PCIE_CTRL_APPS_EN: + value = assert ? 0 : bit; + break; + } + + return imx7_reset_update(imx7src, id, value); +} + +static int imx8mp_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return imx8mp_reset_set(rcdev, id, true); +} + +static int imx8mp_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return imx8mp_reset_set(rcdev, id, false); +} + +static const struct imx7_src_variant variant_imx8mp = { + .signals = imx8mp_src_signals, + .signals_num = ARRAY_SIZE(imx8mp_src_signals), + .ops = { + .assert = imx8mp_reset_assert, + .deassert = imx8mp_reset_deassert, + }, +}; + static int imx7_reset_probe(struct platform_device *pdev) { struct imx7_src *imx7src; @@ -283,6 +383,7 @@ static int imx7_reset_probe(struct platform_device *pdev) static const struct of_device_id imx7_reset_dt_ids[] = { { .compatible = "fsl,imx7d-src", .data = &variant_imx7 }, { .compatible = "fsl,imx8mq-src", .data = &variant_imx8mq }, + { .compatible = "fsl,imx8mp-src", .data = &variant_imx8mp }, { /* sentinel */ }, }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN 2020-02-26 9:13 [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Anson Huang ` (2 preceding siblings ...) 2020-02-26 9:13 ` [PATCH 4/4] reset: imx7: Add support for i.MX8MP SoC Anson Huang @ 2020-03-03 14:07 ` Rob Herring 3 siblings, 0 replies; 8+ messages in thread From: Rob Herring @ 2020-03-03 14:07 UTC (permalink / raw) To: Anson Huang Cc: p.zabel, robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam, devicetree, linux-arm-kernel, linux-kernel, Linux-imx On Wed, 26 Feb 2020 17:13:48 +0800, Anson Huang wrote: > i.MX8MN can reuse i.MX8MQ's reset driver, update the compatible > property and related info to support i.MX8MN. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > .../devicetree/bindings/reset/fsl,imx7-src.txt | 4 +- > include/dt-bindings/reset/imx8mq-reset.h | 56 +++++++++++----------- > 2 files changed, 31 insertions(+), 29 deletions(-) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-03-11 7:24 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-26 9:13 [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Anson Huang 2020-02-26 9:13 ` [PATCH 2/4] dt-bindings: reset: imx7: Document usage on i.MX8MP SoC Anson Huang 2020-03-03 14:08 ` Rob Herring 2020-03-04 9:15 ` Philipp Zabel 2020-02-26 9:13 ` [PATCH 3/4] arm64: dts: imx8mp: Add src node Anson Huang 2020-03-11 7:24 ` Shawn Guo 2020-02-26 9:13 ` [PATCH 4/4] reset: imx7: Add support for i.MX8MP SoC Anson Huang 2020-03-03 14:07 ` [PATCH 1/4] dt-bindings: reset: imx7: Add support for i.MX8MN Rob Herring
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