[PATCH 1/4] soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected

[PATCH 1/4] soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected

[Enric Balletbo i Serra]

The mmsys driver supports only MT8173 device for now, but like other system
controllers is an important piece for other Mediatek devices. Actually
it depends on the mt8173 clock specific driver but that dependency is
not real as it can build without the clock driver. Instead of depends on
a specific model, make the driver depends on the generic ARCH_MEDIATEK and
enable by default so other Mediatek devices can start using it without
flood the Kconfig.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---

 drivers/soc/mediatek/Kconfig | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
index e84513318725..59a56cd790ec 100644
--- a/drivers/soc/mediatek/Kconfig
+++ b/drivers/soc/mediatek/Kconfig
@@ -46,8 +46,7 @@ config MTK_SCPSYS
 
 config MTK_MMSYS
 	bool "MediaTek MMSYS Support"
-	depends on COMMON_CLK_MT8173_MMSYS
-	default COMMON_CLK_MT8173_MMSYS
+	default ARCH_MEDIATEK
 	help
 	  Say yes here to add support for the MediaTek Multimedia
 	  Subsystem (MMSYS).
-- 
2.25.1

[PATCH 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712

[Enric Balletbo i Serra]

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again on
those devices.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
If you have this hardware, please kindly provide your tested tag. Only
build tested.

 drivers/clk/mediatek/clk-mt2712-mm.c | 8 ++------
 drivers/soc/mediatek/mtk-mmsys.c     | 8 ++++++++
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c
index 1c5948be35f3..660c1f63293f 100644
--- a/drivers/clk/mediatek/clk-mt2712-mm.c
+++ b/drivers/clk/mediatek/clk-mt2712-mm.c
@@ -128,9 +128,10 @@ static const struct mtk_gate mm_clks[] = {
 
 static int clk_mt2712_mm_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
 	struct clk_onecell_data *clk_data;
 	int r;
-	struct device_node *node = pdev->dev.of_node;
 
 	clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
 
@@ -146,11 +147,6 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev)
 	return r;
 }
 
-static const struct of_device_id of_match_clk_mt2712_mm[] = {
-	{ .compatible = "mediatek,mt2712-mmsys", },
-	{}
-};
-
 static struct platform_driver clk_mt2712_mm_drv = {
 	.probe = clk_mt2712_mm_probe,
 	.driver = {
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 05e322c9c301..c7d3b7bcfa32 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data {
 	const char *clk_driver;
 };
 
+static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
+	.clk_driver = "clk-mt2712-mm",
+};
+
 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
 	.clk_driver = "clk-mt8173-mm",
 };
@@ -319,6 +323,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id of_match_mtk_mmsys[] = {
+	{
+		.compatible = "mediatek,mt2712-mmsys",
+		.data = &mt2712_mmsys_driver_data,
+	},
 	{
 		.compatible = "mediatek,mt8173-mmsys",
 		.data = &mt8173_mmsys_driver_data,
-- 
2.25.1

[PATCH 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701

[Enric Balletbo i Serra]

Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
If you have this hardware, please kindly provide your tested tag. Only
build tested.

 drivers/clk/mediatek/clk-mt2701-mm.c | 8 ++------
 drivers/soc/mediatek/mtk-mmsys.c     | 8 ++++++++
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
index 054b597d4a73..3a4e895a3d0f 100644
--- a/drivers/clk/mediatek/clk-mt2701-mm.c
+++ b/drivers/clk/mediatek/clk-mt2701-mm.c
@@ -79,16 +79,12 @@ static const struct mtk_gate mm_clks[] = {
 	GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14),
 };
 
-static const struct of_device_id of_match_clk_mt2701_mm[] = {
-	{ .compatible = "mediatek,mt2701-mmsys", },
-	{}
-};
-
 static int clk_mt2701_mm_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
 	struct clk_onecell_data *clk_data;
 	int r;
-	struct device_node *node = pdev->dev.of_node;
 
 	clk_data = mtk_alloc_clk_data(CLK_MM_NR);
 
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index c7d3b7bcfa32..cacafe23c823 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data {
 	const char *clk_driver;
 };
 
+static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
+	.clk_driver = "clk-mt2701-mm",
+};
+
 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
 	.clk_driver = "clk-mt2712-mm",
 };
@@ -323,6 +327,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id of_match_mtk_mmsys[] = {
+	{
+		.compatible = "mediatek,mt2701-mmsys",
+		.data = &mt2701_mmsys_driver_data,
+	},
 	{
 		.compatible = "mediatek,mt2712-mmsys",
 		.data = &mt2712_mmsys_driver_data,
-- 
2.25.1

[PATCH 4/4] arm64: dts: mt8173: Fix mmsys node name

[Enric Balletbo i Serra]

Node names are supposed to match the class of the device, mmsys is a
system controller (syscon) not a clock controller, so change the node
name accordingly.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---

 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 8b4e806d5119..a55e8c177832 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -908,7 +908,7 @@ u2port1: usb-phy@11291000 {
 			};
 		};
 
-		mmsys: clock-controller@14000000 {
+		mmsys: syscon@14000000 {
 			compatible = "mediatek,mt8173-mmsys", "syscon";
 			reg = <0 0x14000000 0 0x1000>;
 			power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
-- 
2.25.1

Re: [PATCH 4/4] arm64: dts: mt8173: Fix mmsys node name

[Chun-Kuang Hu]

Hi, Enric:

Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2020年4月1日 週三 上午5:47寫道：
>
> Node names are supposed to match the class of the device, mmsys is a
> system controller (syscon) not a clock controller, so change the node
> name accordingly.

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
>
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 8b4e806d5119..a55e8c177832 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -908,7 +908,7 @@ u2port1: usb-phy@11291000 {
>                         };
>                 };
>
> -               mmsys: clock-controller@14000000 {
> +               mmsys: syscon@14000000 {
>                         compatible = "mediatek,mt8173-mmsys", "syscon";
>                         reg = <0 0x14000000 0 0x1000>;
>                         power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
> --
> 2.25.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH 1/4] soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected

[Chun-Kuang Hu]

Hi, Enric:

Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2020年4月1日 週三 上午5:46寫道：
>
> The mmsys driver supports only MT8173 device for now, but like other system
> controllers is an important piece for other Mediatek devices. Actually
> it depends on the mt8173 clock specific driver but that dependency is
> not real as it can build without the clock driver. Instead of depends on
> a specific model, make the driver depends on the generic ARCH_MEDIATEK and
> enable by default so other Mediatek devices can start using it without
> flood the Kconfig.

I've no idea about 'enable by default'. For some product which has no
display, it does not need mmsys partition (include drm and mdp). But
the code size of mmsys is not large, so it seems enable it by default
has no harm. Just provide some information for you.

Regards,
Chun-Kuang.

>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
>
>  drivers/soc/mediatek/Kconfig | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
> index e84513318725..59a56cd790ec 100644
> --- a/drivers/soc/mediatek/Kconfig
> +++ b/drivers/soc/mediatek/Kconfig
> @@ -46,8 +46,7 @@ config MTK_SCPSYS
>
>  config MTK_MMSYS
>         bool "MediaTek MMSYS Support"
> -       depends on COMMON_CLK_MT8173_MMSYS
> -       default COMMON_CLK_MT8173_MMSYS
> +       default ARCH_MEDIATEK
>         help
>           Say yes here to add support for the MediaTek Multimedia
>           Subsystem (MMSYS).
> --
> 2.25.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712

[Chun-Kuang Hu]

Hi, Enric:

Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2020年4月1日 週三 上午5:47寫道：
>
> Now that the mmsys driver is the top-level entry point for the
> multimedia subsystem, we could bind the clock and the gpu driver on
> those devices that is expected to work, so the drm driver is
> intantiated by the mmsys driver and display, hopefully, working again on
> those devices.

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> If you have this hardware, please kindly provide your tested tag. Only
> build tested.
>
>  drivers/clk/mediatek/clk-mt2712-mm.c | 8 ++------
>  drivers/soc/mediatek/mtk-mmsys.c     | 8 ++++++++
>  2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c
> index 1c5948be35f3..660c1f63293f 100644
> --- a/drivers/clk/mediatek/clk-mt2712-mm.c
> +++ b/drivers/clk/mediatek/clk-mt2712-mm.c
> @@ -128,9 +128,10 @@ static const struct mtk_gate mm_clks[] = {
>
>  static int clk_mt2712_mm_probe(struct platform_device *pdev)
>  {
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
>         struct clk_onecell_data *clk_data;
>         int r;
> -       struct device_node *node = pdev->dev.of_node;
>
>         clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
>
> @@ -146,11 +147,6 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev)
>         return r;
>  }
>
> -static const struct of_device_id of_match_clk_mt2712_mm[] = {
> -       { .compatible = "mediatek,mt2712-mmsys", },
> -       {}
> -};
> -
>  static struct platform_driver clk_mt2712_mm_drv = {
>         .probe = clk_mt2712_mm_probe,
>         .driver = {
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index 05e322c9c301..c7d3b7bcfa32 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data {
>         const char *clk_driver;
>  };
>
> +static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
> +       .clk_driver = "clk-mt2712-mm",
> +};
> +
>  static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
>         .clk_driver = "clk-mt8173-mm",
>  };
> @@ -319,6 +323,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>  }
>
>  static const struct of_device_id of_match_mtk_mmsys[] = {
> +       {
> +               .compatible = "mediatek,mt2712-mmsys",
> +               .data = &mt2712_mmsys_driver_data,
> +       },
>         {
>                 .compatible = "mediatek,mt8173-mmsys",
>                 .data = &mt8173_mmsys_driver_data,
> --
> 2.25.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701

[Chun-Kuang Hu]

Hi, Enric:

Enric Balletbo i Serra <enric.balletbo@collabora.com> 於 2020年4月1日 週三 上午5:47寫道：
>
> Now that the mmsys driver is the top-level entry point for the
> multimedia subsystem, we could bind the clock and the gpu driver on
> those devices that is expected to work, so the drm driver is
> intantiated by the mmsys driver and display, hopefully, working again.

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> If you have this hardware, please kindly provide your tested tag. Only
> build tested.
>
>  drivers/clk/mediatek/clk-mt2701-mm.c | 8 ++------
>  drivers/soc/mediatek/mtk-mmsys.c     | 8 ++++++++
>  2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt2701-mm.c b/drivers/clk/mediatek/clk-mt2701-mm.c
> index 054b597d4a73..3a4e895a3d0f 100644
> --- a/drivers/clk/mediatek/clk-mt2701-mm.c
> +++ b/drivers/clk/mediatek/clk-mt2701-mm.c
> @@ -79,16 +79,12 @@ static const struct mtk_gate mm_clks[] = {
>         GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14),
>  };
>
> -static const struct of_device_id of_match_clk_mt2701_mm[] = {
> -       { .compatible = "mediatek,mt2701-mmsys", },
> -       {}
> -};
> -
>  static int clk_mt2701_mm_probe(struct platform_device *pdev)
>  {
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
>         struct clk_onecell_data *clk_data;
>         int r;
> -       struct device_node *node = pdev->dev.of_node;
>
>         clk_data = mtk_alloc_clk_data(CLK_MM_NR);
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index c7d3b7bcfa32..cacafe23c823 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data {
>         const char *clk_driver;
>  };
>
> +static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
> +       .clk_driver = "clk-mt2701-mm",
> +};
> +
>  static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
>         .clk_driver = "clk-mt2712-mm",
>  };
> @@ -323,6 +327,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>  }
>
>  static const struct of_device_id of_match_mtk_mmsys[] = {
> +       {
> +               .compatible = "mediatek,mt2701-mmsys",
> +               .data = &mt2701_mmsys_driver_data,
> +       },
>         {
>                 .compatible = "mediatek,mt2712-mmsys",
>                 .data = &mt2712_mmsys_driver_data,
> --
> 2.25.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2372 bytes --]

Hi Enric,

I love your patch! Yet something to improve:

[auto build test ERROR on next-20200331]
[cannot apply to clk/clk-next robh/for-next rockchip/for-next keystone/next arm64/for-next/core arm-soc/for-next shawnguo/for-next arm/for-next xlnx/master linus/master v5.6 v5.6-rc7 v5.6-rc6 v5.6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Enric-Balletbo-i-Serra/soc-mediatek-Enable-mmsys-driver-by-default-if-Mediatek-arch-is-selected/20200401-054911
base:    3eb7cccdb3ae41ebb6a2f5f1ccd2821550c61fe1
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-6) 7.4.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/clk/mediatek/clk-mt2712-mm.c:154:21: error: 'of_match_clk_mt2712_mm' undeclared here (not in a function)
      .of_match_table = of_match_clk_mt2712_mm,
                        ^~~~~~~~~~~~~~~~~~~~~~

vim +/of_match_clk_mt2712_mm +154 drivers/clk/mediatek/clk-mt2712-mm.c

e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  149  
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  150  static struct platform_driver clk_mt2712_mm_drv = {
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  151  	.probe = clk_mt2712_mm_probe,
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  152  	.driver = {
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  153  		.name = "clk-mt2712-mm",
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23 @154  		.of_match_table = of_match_clk_mt2712_mm,
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  155  	},
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  156  };
e2f744a82d725a weiyi.lu@mediatek.com 2017-10-23  157  

:::::: The code at line 154 was first introduced by commit
:::::: e2f744a82d725ab55091cccfb8e527b4220471f0 clk: mediatek: Add MT2712 clock support

:::::: TO: weiyi.lu@mediatek.com <weiyi.lu@mediatek.com>
:::::: CC: Stephen Boyd <sboyd@codeaurora.org>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 72598 bytes --]

Re: [PATCH 3/4] clk / soc: mediatek: Bind clock and gpu driver for mt2701

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2275 bytes --]

Hi Enric,

I love your patch! Yet something to improve:

[auto build test ERROR on next-20200331]
[cannot apply to clk/clk-next robh/for-next rockchip/for-next keystone/next arm64/for-next/core arm-soc/for-next shawnguo/for-next arm/for-next xlnx/master linus/master v5.6 v5.6-rc7 v5.6-rc6 v5.6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Enric-Balletbo-i-Serra/soc-mediatek-Enable-mmsys-driver-by-default-if-Mediatek-arch-is-selected/20200401-054911
base:    3eb7cccdb3ae41ebb6a2f5f1ccd2821550c61fe1
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-6) 7.4.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/clk/mediatek/clk-mt2701-mm.c:107:21: error: 'of_match_clk_mt2701_mm' undeclared here (not in a function)
      .of_match_table = of_match_clk_mt2701_mm,
                        ^~~~~~~~~~~~~~~~~~~~~~

vim +/of_match_clk_mt2701_mm +107 drivers/clk/mediatek/clk-mt2701-mm.c

e9862118272aa5 Shunli Wang 2016-11-04  102  
e9862118272aa5 Shunli Wang 2016-11-04  103  static struct platform_driver clk_mt2701_mm_drv = {
e9862118272aa5 Shunli Wang 2016-11-04  104  	.probe = clk_mt2701_mm_probe,
e9862118272aa5 Shunli Wang 2016-11-04  105  	.driver = {
e9862118272aa5 Shunli Wang 2016-11-04  106  		.name = "clk-mt2701-mm",
e9862118272aa5 Shunli Wang 2016-11-04 @107  		.of_match_table = of_match_clk_mt2701_mm,
e9862118272aa5 Shunli Wang 2016-11-04  108  	},
e9862118272aa5 Shunli Wang 2016-11-04  109  };
e9862118272aa5 Shunli Wang 2016-11-04  110  

:::::: The code at line 107 was first introduced by commit
:::::: e9862118272aa528e35e54ef9f1e35c217870fd7 clk: mediatek: Add MT2701 clock support

:::::: TO: Shunli Wang <shunli.wang@mediatek.com>
:::::: CC: Stephen Boyd <sboyd@codeaurora.org>

---
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