From: Steven Rostedt <rostedt@goodmis.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Zhenyu Ye <yezhenyu2@huawei.com>,
mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com,
aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org,
npiggin@gmail.com, arnd@arndb.de, maz@kernel.org,
suzuki.poulose@arm.com, tglx@linutronix.de, yuzhao@google.com,
Dave.Martin@arm.com, steven.price@arm.com, broonie@kernel.org,
guohanjun@huawei.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
linux-mm@kvack.org, arm@kernel.org, xiexiangyou@huawei.com,
prime.zeng@hisilicon.com, zhangshaokun@hisilicon.com,
kuhn.chenqun@huawei.com
Subject: Re: [PATCH v1 6/6] arm64: tlb: Set the TTL field in flush_tlb_range
Date: Mon, 20 Apr 2020 20:06:16 -0400 [thread overview]
Message-ID: <20200420200616.44c7c7ea@oasis.local.home> (raw)
In-Reply-To: <20200420121055.GF20696@hirez.programming.kicks-ass.net>
On Mon, 20 Apr 2020 14:10:55 +0200
Peter Zijlstra <peterz@infradead.org> wrote:
> On Fri, Apr 03, 2020 at 05:00:48PM +0800, Zhenyu Ye wrote:
> > This patch uses the cleared_* in struct mmu_gather to set the
> > TTL field in flush_tlb_range().
> >
> > Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
> > ---
> > arch/arm64/include/asm/tlb.h | 26 +++++++++++++++++++++++++-
> > arch/arm64/include/asm/tlbflush.h | 14 ++++++++------
> > 2 files changed, 33 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
> > index b76df828e6b7..d5ab72eccff4 100644
> > --- a/arch/arm64/include/asm/tlb.h
> > +++ b/arch/arm64/include/asm/tlb.h
> > @@ -21,11 +21,34 @@ static void tlb_flush(struct mmu_gather *tlb);
> >
> > #include <asm-generic/tlb.h>
> >
> > +/*
> > + * get the tlbi levels in arm64. Default value is 0 if more than one
> > + * of cleared_* is set or neither is set.
> > + * Arm64 doesn't support p4ds now.
> > + */
> > +static inline int tlb_get_level(struct mmu_gather *tlb)
> > +{
> > + int sum = tlb->cleared_ptes + tlb->cleared_pmds +
> > + tlb->cleared_puds + tlb->cleared_p4ds;
> > +
> > + if (sum != 1)
> > + return 0;
> > + else if (tlb->cleared_ptes)
> > + return 3;
> > + else if (tlb->cleared_pmds)
> > + return 2;
> > + else if (tlb->cleared_puds)
> > + return 1;
> > +
> > + return 0;
> > +}
>
> That's some mighty wonky code. Please look at the generated asm.
Without even looking at the generated asm, if a condition returns,
there's no reason to add an else for that condition.
if (x)
return 1;
else if (y)
return 2;
else
return 3;
Is exactly the same as:
if (x)
return 1;
if (y)
return 2;
return 3;
-- Steve
next prev parent reply other threads:[~2020-04-21 0:06 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-03 9:00 [PATCH v1 0/6] arm64: tlb: add support for TTL feature Zhenyu Ye
2020-04-03 9:00 ` [PATCH v1 1/6] arm64: Detect the ARMv8.4 " Zhenyu Ye
2020-04-21 16:53 ` Christoph Hellwig
2020-04-21 17:13 ` Peter Zijlstra
2020-04-21 17:16 ` Christoph Hellwig
2020-04-22 2:13 ` Zhenyu Ye
2020-04-03 9:00 ` [PATCH v1 2/6] arm64: Add level-hinted TLB invalidation helper Zhenyu Ye
2020-04-03 9:00 ` [PATCH v1 3/6] arm64: Add tlbi_user_level " Zhenyu Ye
2020-04-03 9:00 ` [PATCH v1 4/6] tlb: mmu_gather: add tlb_set_*_range APIs Zhenyu Ye
2020-04-20 11:46 ` Peter Zijlstra
2020-04-03 9:00 ` [PATCH v1 5/6] mm: tlb: Provide flush_*_tlb_range wrappers Zhenyu Ye
2020-04-20 12:09 ` Peter Zijlstra
2020-04-21 14:18 ` Zhenyu Ye
2020-04-03 9:00 ` [PATCH v1 6/6] arm64: tlb: Set the TTL field in flush_tlb_range Zhenyu Ye
2020-04-20 12:10 ` Peter Zijlstra
2020-04-21 0:06 ` Steven Rostedt [this message]
2020-04-21 8:30 ` Peter Zijlstra
2020-04-21 12:22 ` Zhenyu Ye
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