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From: Peter Zijlstra <peterz@infradead.org>
To: Christoph Hellwig <hch@infradead.org>
Cc: Zhenyu Ye <yezhenyu2@huawei.com>,
	mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com,
	aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org,
	npiggin@gmail.com, arnd@arndb.de, rostedt@goodmis.org,
	maz@kernel.org, suzuki.poulose@arm.com, tglx@linutronix.de,
	yuzhao@google.com, Dave.Martin@arm.com, steven.price@arm.com,
	broonie@kernel.org, guohanjun@huawei.com,
	linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	xiexiangyou@huawei.com, zhangshaokun@hisilicon.com,
	linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com,
	kuhn.chenqun@huawei.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 1/6] arm64: Detect the ARMv8.4 TTL feature
Date: Tue, 21 Apr 2020 19:13:28 +0200	[thread overview]
Message-ID: <20200421171328.GW20730@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200421165346.GA11171@infradead.org>

On Tue, Apr 21, 2020 at 09:53:46AM -0700, Christoph Hellwig wrote:
> On Fri, Apr 03, 2020 at 05:00:43PM +0800, Zhenyu Ye wrote:
> > From: Marc Zyngier <maz@kernel.org>
> > 
> > In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL
> > feature allows TLBs to be issued with a level allowing for quicker
> > invalidation.
> 
> What does "issued with a level" mean?

What I understood it to be is page-size based on page-table hierarchy.
Just like we have on x86, 4k, 2m, 1g etc..

So where x86 INVLPG will tear down any sized page for the address given,
you can now day, kill me the PMD level translation for @addr.

Power9 radix also has things like this.

  reply	other threads:[~2020-04-21 17:14 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-03  9:00 [PATCH v1 0/6] arm64: tlb: add support for TTL feature Zhenyu Ye
2020-04-03  9:00 ` [PATCH v1 1/6] arm64: Detect the ARMv8.4 " Zhenyu Ye
2020-04-21 16:53   ` Christoph Hellwig
2020-04-21 17:13     ` Peter Zijlstra [this message]
2020-04-21 17:16       ` Christoph Hellwig
2020-04-22  2:13         ` Zhenyu Ye
2020-04-03  9:00 ` [PATCH v1 2/6] arm64: Add level-hinted TLB invalidation helper Zhenyu Ye
2020-04-03  9:00 ` [PATCH v1 3/6] arm64: Add tlbi_user_level " Zhenyu Ye
2020-04-03  9:00 ` [PATCH v1 4/6] tlb: mmu_gather: add tlb_set_*_range APIs Zhenyu Ye
2020-04-20 11:46   ` Peter Zijlstra
2020-04-03  9:00 ` [PATCH v1 5/6] mm: tlb: Provide flush_*_tlb_range wrappers Zhenyu Ye
2020-04-20 12:09   ` Peter Zijlstra
2020-04-21 14:18     ` Zhenyu Ye
2020-04-03  9:00 ` [PATCH v1 6/6] arm64: tlb: Set the TTL field in flush_tlb_range Zhenyu Ye
2020-04-20 12:10   ` Peter Zijlstra
2020-04-21  0:06     ` Steven Rostedt
2020-04-21  8:30       ` Peter Zijlstra
2020-04-21 12:22         ` Zhenyu Ye

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