linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: <Tudor.Ambarus@microchip.com>
To: <alexandre.belloni@bootlin.com>,
	<Ludovic.Desroches@microchip.com>, <Nicolas.Ferre@microchip.com>
Cc: <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Codrin.Ciubotariu@microchip.com>,
	<Tudor.Ambarus@microchip.com>
Subject: [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
Date: Thu, 14 May 2020 05:03:10 +0000	[thread overview]
Message-ID: <20200514050301.147442-7-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>

From: Tudor Ambarus <tudor.ambarus@microchip.com>

The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

There is a single functional change in this patch. With the move of the
flx0 uart5 definition in the SoC dtsi, the uart5 from
at91-sama5d27_wlsom1_ek.dts inherits the following optional property:
atmel,fifo-size = <32>;
This particular change was tested by Codrin.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
 arch/arm/boot/dts/at91-kizbox3_common.dtsi    | 13 ------
 arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 12 ------
 arch/arm/boot/dts/at91-sama5d2_icp.dts        |  6 ---
 arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts     |  7 ----
 arch/arm/boot/dts/at91-sama5d2_xplained.dts   |  7 +---
 arch/arm/boot/dts/sama5d2.dtsi                | 40 +++++++++++++++++++
 6 files changed, 41 insertions(+), 44 deletions(-)

diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi
index 4351a8d32225..7c3076e245ef 100644
--- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi
+++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi
@@ -299,21 +299,8 @@
 	status = "disabled";
 
 	uart5: serial@200  {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0x200 0x400>;
-		interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
-		dmas = <&dma0
-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
-			| AT91_XDMAC_DT_PERID(11))>,
-		       <&dma0
-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
-			| AT91_XDMAC_DT_PERID(12))>;
-		dma-names = "tx", "rx";
-		clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
-		clock-names = "usart";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_flx0_default>;
-		atmel,fifo-size = <32>;
 		atmel,use-dma-rx;
 		atmel,use-dma-tx;
 		status = "disabled";
diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
index 6b8461278950..6b38fa3f5568 100644
--- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
@@ -77,18 +77,6 @@
 	status = "okay";
 
 	uart5: serial@200 {
-		compatible = "atmel,at91sam9260-usart";
-		reg = <0x200 0x200>;
-		interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
-		dmas = <&dma0
-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
-			 AT91_XDMAC_DT_PERID(11))>,
-		       <&dma0
-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
-			 AT91_XDMAC_DT_PERID(12))>;
-		dma-names = "tx", "rx";
-		clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
-		clock-names = "usart";
 		pinctrl-0 = <&pinctrl_flx0_default>;
 		pinctrl-names = "default";
 		atmel,use-dma-rx;
diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts
index 23f413afb333..4a01ab8e7e70 100644
--- a/arch/arm/boot/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts
@@ -105,15 +105,9 @@
 	status = "okay";
 
 	spi2: spi@400 {
-		compatible = "atmel,at91rm9200-spi";
-		reg = <0x400 0x200>;
-		interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
-		clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
-		clock-names = "spi_clk";
 		cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>;
-		atmel,fifo-size = <16>;
 		status = "okay";
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
index 32435ce1dab2..8ad3a9c6c536 100644
--- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
@@ -191,20 +191,13 @@
 				status = "okay";
 
 				i2c2: i2c@600 {
-					compatible = "atmel,sama5d2-i2c";
-					reg = <0x600 0x200>;
-					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
 					dmas = <0>, <0>;
 					dma-names = "tx", "rx";
-					#address-cells = <1>;
-					#size-cells = <0>;
-					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
 					pinctrl-names = "default", "gpio";
 					pinctrl-0 = <&pinctrl_flx0_default>;
 					pinctrl-1 = <&pinctrl_flx0_gpio>;
 					sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
 					scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>;
-					atmel,fifo-size = <16>;
 					status = "okay";
 				};
 			};
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index a5046f8257ad..da4442715ea5 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -327,14 +327,9 @@
 				status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
 
 				uart5: serial@200 {
-					compatible = "atmel,at91sam9260-usart";
-					reg = <0x200 0x200>;
-					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
-					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
-					clock-names = "usart";
+					dmas = <0>, <0>;
 					pinctrl-names = "default";
 					pinctrl-0 = <&pinctrl_flx0_default>;
-					atmel,fifo-size = <32>;
 					status = "okay";
 				};
 			};
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 79ed7bd02df6..acb91908bd74 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -635,6 +635,46 @@
 				#size-cells = <1>;
 				ranges = <0x0 0xf8034000 0x800>;
 				status = "disabled";
+
+				uart5: serial@200 {
+					compatible = "atmel,at91sam9260-usart";
+					reg = <0x200 0x200>;
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+					clock-names = "usart";
+					dmas = <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(11))>,
+					       <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(12))>;
+					dma-names = "tx", "rx";
+					atmel,fifo-size = <32>;
+					status = "disabled";
+				};
+
+				spi2: spi@400 {
+					compatible = "atmel,at91rm9200-spi";
+					reg = <0x400 0x200>;
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+					clock-names = "spi_clk";
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+
+				i2c2: i2c@600 {
+					compatible = "atmel,sama5d2-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
 			};
 
 			flx1: flexcom@f8038000 {
-- 
2.23.0

  parent reply	other threads:[~2020-05-14  5:04 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14  5:03 [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 02/16] ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 04/16] ARM: dts: at91: sama5d2: Move flx2 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 " Tudor.Ambarus
2020-05-14  5:03 ` Tudor.Ambarus [this message]
2020-05-14  5:03 ` [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 09/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Tudor.Ambarus
2020-05-15 14:51 ` [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Alexandre Belloni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200514050301.147442-7-tudor.ambarus@microchip.com \
    --to=tudor.ambarus@microchip.com \
    --cc=Codrin.Ciubotariu@microchip.com \
    --cc=Ludovic.Desroches@microchip.com \
    --cc=Nicolas.Ferre@microchip.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    --subject='Re: [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).