From: Peter Zijlstra <peterz@infradead.org>
To: Like Xu <like.xu@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Thomas Gleixner <tglx@linutronix.de>,
ak@linux.intel.com, wei.w.wang@intel.com
Subject: Re: [PATCH v11 10/11] KVM: x86/pmu: Check guest LBR availability in case host reclaims them
Date: Tue, 19 May 2020 13:15:59 +0200 [thread overview]
Message-ID: <20200519111559.GJ279861@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200514083054.62538-11-like.xu@linux.intel.com>
On Thu, May 14, 2020 at 04:30:53PM +0800, Like Xu wrote:
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index ea4faae56473..db185dca903d 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -646,6 +646,43 @@ static void intel_pmu_lbr_cleanup(struct kvm_vcpu *vcpu)
> intel_pmu_free_lbr_event(vcpu);
> }
>
> +static bool intel_pmu_lbr_is_availabile(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
> +
> + if (!pmu->lbr_event)
> + return false;
> +
> + if (event_is_oncpu(pmu->lbr_event)) {
> + intel_pmu_intercept_lbr_msrs(vcpu, false);
> + } else {
> + intel_pmu_intercept_lbr_msrs(vcpu, true);
> + return false;
> + }
> +
> + return true;
> +}
This is unreadable gunk, what?
> +/*
> + * Higher priority host perf events (e.g. cpu pinned) could reclaim the
> + * pmu resources (e.g. LBR) that were assigned to the guest. This is
> + * usually done via ipi calls (more details in perf_install_in_context).
> + *
> + * Before entering the non-root mode (with irq disabled here), double
> + * confirm that the pmu features enabled to the guest are not reclaimed
> + * by higher priority host events. Otherwise, disallow vcpu's access to
> + * the reclaimed features.
> + */
> +static void intel_pmu_availability_check(struct kvm_vcpu *vcpu)
> +{
> + lockdep_assert_irqs_disabled();
> +
> + if (lbr_is_enabled(vcpu) && !intel_pmu_lbr_is_availabile(vcpu) &&
> + (vmcs_read64(GUEST_IA32_DEBUGCTL) & DEBUGCTLMSR_LBR))
> + pr_warn_ratelimited("kvm: vcpu-%d: LBR is temporarily unavailable.\n",
> + vcpu->vcpu_id);
More unreadable nonsense; when the events go into ERROR state, it's a
permanent fail, they'll not come back.
> +}
> +
> struct kvm_pmu_ops intel_pmu_ops = {
> .find_arch_event = intel_find_arch_event,
> .find_fixed_event = intel_find_fixed_event,
> @@ -662,4 +699,5 @@ struct kvm_pmu_ops intel_pmu_ops = {
> .reset = intel_pmu_reset,
> .deliver_pmi = intel_pmu_deliver_pmi,
> .lbr_cleanup = intel_pmu_lbr_cleanup,
> + .availability_check = intel_pmu_availability_check,
> };
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 9969d663826a..80d036c5f64a 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -6696,8 +6696,10 @@ static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)
>
> pt_guest_enter(vmx);
>
> - if (vcpu_to_pmu(vcpu)->version)
> + if (vcpu_to_pmu(vcpu)->version) {
> atomic_switch_perf_msrs(vmx);
> + kvm_x86_ops.pmu_ops->availability_check(vcpu);
> + }
AFAICT you just did a call out to the kvm_pmu crud in
atomic_switch_perf_msrs(), why do another call?
next prev parent reply other threads:[~2020-05-19 11:16 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 8:30 [PATCH v11 00/11] Guest Last Branch Recording Enabling Like Xu
2020-05-14 8:30 ` [PATCH v11 01/11] perf/x86: Fix variable types for LBR registers Like Xu
2020-05-14 8:30 ` [PATCH v11 02/11] perf/x86/core: Refactor hw->idx checks and cleanup Like Xu
2020-05-14 8:30 ` [PATCH v11 03/11] perf/x86/lbr: Add interface to get basic information about LBR stack Like Xu
2020-05-14 8:30 ` [PATCH v11 04/11] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-05-18 11:43 ` Peter Zijlstra
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Like Xu
2020-05-14 8:30 ` [PATCH v11 05/11] perf/x86: Keep LBR stack unchanged in host context for guest LBR event Like Xu
2020-05-18 11:59 ` Peter Zijlstra
2020-05-18 12:02 ` Peter Zijlstra
2020-05-19 3:08 ` Like Xu
2020-05-19 10:45 ` Peter Zijlstra
2020-05-19 13:25 ` Xu, Like
2020-07-03 8:01 ` [tip: perf/core] perf/x86: Keep LBR records unchanged in host context for guest usage tip-bot2 for Like Xu
2020-05-14 8:30 ` [PATCH v11 06/11] KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in Like Xu
2020-05-14 8:30 ` [PATCH v11 07/11] KVM: x86: Expose MSR_IA32_PERF_CAPABILITIES for LBR record format Like Xu
2020-05-19 10:53 ` Peter Zijlstra
2020-05-19 12:19 ` Xu, Like
2020-05-19 15:12 ` Sean Christopherson
2020-05-14 8:30 ` [PATCH v11 08/11] KVM: x86/pmu: Emulate LBR feature via guest LBR event Like Xu
2020-05-19 11:00 ` Peter Zijlstra
2020-05-19 12:24 ` Xu, Like
2020-05-19 11:01 ` Peter Zijlstra
2020-05-19 12:28 ` Xu, Like
2020-05-19 11:03 ` Peter Zijlstra
2020-05-19 12:40 ` Xu, Like
2020-05-14 8:30 ` [PATCH v11 09/11] KVM: x86/pmu: Release guest LBR event via vPMU lazy release mechanism Like Xu
2020-05-14 8:30 ` [PATCH v11 10/11] KVM: x86/pmu: Check guest LBR availability in case host reclaims them Like Xu
2020-05-19 11:15 ` Peter Zijlstra [this message]
2020-05-19 13:10 ` Xu, Like
2020-05-19 14:57 ` Peter Zijlstra
2020-05-20 2:01 ` Xu, Like
2020-05-27 8:17 ` Like Xu
2020-05-14 8:30 ` [PATCH v11 11/11] KVM: x86/pmu: Reduce the overhead of LBR passthrough or cancellation Like Xu
2020-05-27 8:28 ` [PATCH v11 00/11] Guest Last Branch Recording Enabling Xu, Like
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