From: Vinod Koul <vkoul@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Serge Semin <fancer.lancer@gmail.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Viresh Kumar <vireshk@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Paul Burton <paulburton@kernel.org>,
Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
Dan Williams <dan.j.williams@intel.com>,
linux-mips@vger.kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property
Date: Tue, 19 May 2020 22:43:04 +0530 [thread overview]
Message-ID: <20200519171304.GU374218@vkoul-mobl.Dlink> (raw)
In-Reply-To: <20200517174739.uis3wfievdcmtsxj@mobilestation>
On 17-05-20, 20:47, Serge Semin wrote:
> On Fri, May 15, 2020 at 02:11:13PM +0300, Serge Semin wrote:
> > On Fri, May 15, 2020 at 04:26:58PM +0530, Vinod Koul wrote:
> > > On 15-05-20, 13:51, Andy Shevchenko wrote:
> > > > On Fri, May 15, 2020 at 11:39:11AM +0530, Vinod Koul wrote:
> > > > > On 12-05-20, 15:38, Andy Shevchenko wrote:
> > > > > > On Tue, May 12, 2020 at 02:49:46PM +0300, Serge Semin wrote:
> > > > > > > On Tue, May 12, 2020 at 12:08:04PM +0300, Andy Shevchenko wrote:
> > > > > > > > On Tue, May 12, 2020 at 12:35:31AM +0300, Serge Semin wrote:
> > > > > > > > > On Tue, May 12, 2020 at 12:01:38AM +0300, Andy Shevchenko wrote:
> > > > > > > > > > On Mon, May 11, 2020 at 11:05:28PM +0300, Serge Semin wrote:
> > > > > > > > > > > On Fri, May 08, 2020 at 02:12:42PM +0300, Andy Shevchenko wrote:
> > > > > > > > > > > > On Fri, May 08, 2020 at 01:53:00PM +0300, Serge Semin wrote:
> > > >
> > > > ...
> > > >
> > > > > > I leave it to Rob and Vinod.
> > > > > > It won't break our case, so, feel free with your approach.
> > > > >
> > > > > I agree the DT is about describing the hardware and looks like value of
> > > > > 1 is not allowed. If allowed it should be added..
> > > >
> > > > It's allowed at *run time*, it's illegal in *pre-silicon stage* when
> > > > synthesizing the IP.
> > >
> > > Then it should be added ..
> >
> > Vinod, max-burst-len is "MAXimum" burst length not "run-time or current or any
> > other" burst length. It's a constant defined at the IP-core synthesis stage and
> > according to the Data Book, MAX burst length can't be 1. The allowed values are
> > exactly as I described in the binding [4, 8, 16, 32, ...]. MAX burst length
> > defines the upper limit of the run-time burst length. So setting it to 1 isn't
> > about describing a hardware, but using DT for the software convenience.
> >
> > -Sergey
>
> Vinod, to make this completely clear. According to the DW DMAC data book:
> - In general, run-time parameter of the DMA transaction burst length (set in
> the SRC_MSIZE/DST_MSIZE fields of the channel control register) may belong
> to the set [1, 4, 8, 16, 32, 64, 128, 256].
so 1 is valid value for msize
> - Actual upper limit of the burst length run-time parameter is limited by a
> constant defined at the IP-synthesize stage (it's called DMAH_CHx_MAX_MULT_SIZE)
> and this constant belongs to the set [4, 8, 16, 32, 64, 128, 256]. (See, no 1
> in this set).
maximum can be 4 onwards, but in my configuration I can choose 1 as
value for msize
> So the run-time burst length in a case of particular DW DMA controller belongs
> to the range:
> 1 <= SRC_MSIZE <= DMAH_CHx_MAX_MULT_SIZE
> and
> 1 <= DST_MSIZE <= DMAH_CHx_MAX_MULT_SIZE
>
> See. No mater which DW DMA controller we get each of them will at least support
> the burst length of 1 and 4 transfer words. This is determined by design of the
> DW DMA controller IP since DMAH_CHx_MAX_MULT_SIZE constant set starts with 4.
>
> In this patch I suggest to add the max-burst-len property, which specifies
> the upper limit for the run-time burst length. Since the maximum burst length
> capable to be set to the SRC_MSIZE/DST_MSIZE fields of the DMA channel control
> register is determined by the DMAH_CHx_MAX_MULT_SIZE constant (which can't be 1
> by the DW DMA IP design), max-burst-len property as being also responsible for
> the maximum burst length setting should be associated with DMAH_CHx_MAX_MULT_SIZE
> thus should belong to the same set [4, 8, 16, 32, 64, 128, 256].
>
> So 1 shouldn't be in the enum of the max-burst-len property constraint, because
> hardware doesn't support such limitation by design, while setting 1 as
> max-burst-len would mean incorrect description of the DMA controller.
>
> Vinod, could you take a look at the info I provided above and say your final word
> whether 1 should be really allowed to be in the max-burst-len enum constraints?
> I'll do as you say in the next version of the patchset.
You are specifying the parameter which will be used to pick, i think
starting with 4 makes sense as we are specifying maximum allowed values
for msize. Values lesser than or equal to this would be allowed, I guess
that should be added to documentation.
thanks
--
~Vinod
next prev parent reply other threads:[~2020-05-19 17:13 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 13:10 [PATCH 0/5] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Sergey.Semin
2020-03-06 13:29 ` Andy Shevchenko
2020-03-06 13:30 ` Andy Shevchenko
2020-03-06 13:43 ` Vinod Koul
[not found] ` <20200306135050.40094803087C@mail.baikalelectronics.ru>
2020-03-09 21:45 ` Sergey Semin
[not found] ` <20200306133756.0F74C8030793@mail.baikalelectronics.ru>
2020-03-06 13:47 ` Sergey Semin
2020-03-06 14:11 ` Andy Shevchenko
[not found] ` <20200306141135.9C4F380307C2@mail.baikalelectronics.ru>
2020-03-09 22:08 ` Sergey Semin
2020-05-08 10:52 ` [PATCH v2 0/6] " Serge Semin
2020-05-08 10:52 ` [PATCH v2 1/6] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-18 17:50 ` Rob Herring
2020-05-08 10:53 ` [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-08 11:12 ` Andy Shevchenko
2020-05-11 20:05 ` Serge Semin
2020-05-11 21:01 ` Andy Shevchenko
2020-05-11 21:35 ` Serge Semin
2020-05-12 9:08 ` Andy Shevchenko
2020-05-12 11:49 ` Serge Semin
2020-05-12 12:38 ` Andy Shevchenko
2020-05-15 6:09 ` Vinod Koul
2020-05-15 10:51 ` Andy Shevchenko
2020-05-15 10:56 ` Vinod Koul
2020-05-15 11:11 ` Serge Semin
2020-05-17 17:47 ` Serge Semin
2020-05-18 17:30 ` Rob Herring
2020-05-18 19:30 ` Serge Semin
2020-05-19 17:13 ` Vinod Koul [this message]
2020-05-21 1:33 ` Serge Semin
2020-05-08 10:53 ` [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-08 11:21 ` Andy Shevchenko
2020-05-08 18:49 ` Vineet Gupta
2020-05-11 21:16 ` Serge Semin
2020-05-12 12:35 ` Andy Shevchenko
2020-05-12 17:01 ` Serge Semin
2020-05-15 6:16 ` Vinod Koul
2020-05-15 10:53 ` Andy Shevchenko
2020-05-17 18:22 ` Serge Semin
2020-05-08 10:53 ` [PATCH v2 4/6] dmaengine: dw: Print warning if multi-block is unsupported Serge Semin
2020-05-08 11:26 ` Andy Shevchenko
2020-05-08 11:53 ` Mark Brown
2020-05-08 19:06 ` Andy Shevchenko
2020-05-11 3:13 ` Serge Semin
2020-05-11 14:03 ` Andy Shevchenko
2020-05-11 2:10 ` Serge Semin
2020-05-11 11:58 ` Mark Brown
2020-05-11 13:45 ` Serge Semin
2020-05-11 13:58 ` Andy Shevchenko
2020-05-11 17:48 ` Mark Brown
2020-05-11 18:25 ` Serge Semin
2020-05-11 19:32 ` Serge Semin
2020-05-11 21:07 ` Andy Shevchenko
2020-05-11 21:08 ` Andy Shevchenko
2020-05-12 12:42 ` Serge Semin
2020-05-15 6:30 ` Vinod Koul
2020-05-17 19:23 ` Serge Semin
2020-05-19 17:02 ` Vinod Koul
2020-05-21 1:40 ` Serge Semin
2020-05-11 17:44 ` Mark Brown
2020-05-11 18:32 ` Serge Semin
2020-05-11 21:32 ` Mark Brown
2020-05-08 10:53 ` [PATCH v2 5/6] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-08 11:41 ` Andy Shevchenko
2020-05-12 14:08 ` Serge Semin
2020-05-12 19:12 ` Andy Shevchenko
2020-05-12 19:47 ` Serge Semin
2020-05-15 11:02 ` Andy Shevchenko
2020-05-15 6:39 ` Vinod Koul
2020-05-17 19:38 ` Serge Semin
2020-05-19 17:07 ` Vinod Koul
2020-05-21 1:47 ` Serge Semin
2020-05-08 10:53 ` [PATCH v2 6/6] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-08 11:43 ` Andy Shevchenko
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