* [PATCH v3 1/2] arm64: dts: add qe node to ls1043ardb
@ 2020-05-20 4:02 Qiang Zhao
2020-05-20 4:02 ` [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts " Qiang Zhao
2020-05-20 15:01 ` [PATCH v3 1/2] arm64: dts: add qe node " Shawn Guo
0 siblings, 2 replies; 4+ messages in thread
From: Qiang Zhao @ 2020-05-20 4:02 UTC (permalink / raw)
To: shawnguo; +Cc: leoyang.li, devicetree, linux-kernel, Zhao Qiang
From: Zhao Qiang <qiang.zhao@nxp.com>
Add qe node to fsl-ls1043a.dtsi and fsl-ls1043a-rdb.dts
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
v2:
- add commit msg and drop a new blank line
v3:
- Keep labeling node sort alphabetically
- remove unused device_type
- use GIC_SPI and IRQ_TYPE_LEVEL_HIGH
- use "arm64: dts:" format for subject
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 65 +++++++++++++++++++++++
2 files changed, 81 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index dde50c8..44d9343 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -176,3 +176,19 @@
};
};
};
+
+&uqe {
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index c084c7a4..3b641bd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -525,6 +525,71 @@
#interrupt-cells = <2>;
};
+ uqe: uqe@2400000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe", "simple-bus";
+ ranges = <0x0 0x0 0x2400000 0x40000>;
+ reg = <0x0 0x2400000 0x0 0x480>;
+ brg-frequency = <100000000>;
+ bus-frequency = <200000000>;
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: qeic@80 {
+ compatible = "fsl,qe-ic";
+ reg = <0x80 0x80>;
+ #address-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,ls1043-qe-si",
+ "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ls1043-qe-siram",
+ "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+ };
+
lpuart0: serial@2950000 {
compatible = "fsl,ls1021a-lpuart";
reg = <0x0 0x2950000 0x0 0x1000>;
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts to ls1043ardb
2020-05-20 4:02 [PATCH v3 1/2] arm64: dts: add qe node to ls1043ardb Qiang Zhao
@ 2020-05-20 4:02 ` Qiang Zhao
2020-05-22 19:38 ` Li Yang
2020-05-20 15:01 ` [PATCH v3 1/2] arm64: dts: add qe node " Shawn Guo
1 sibling, 1 reply; 4+ messages in thread
From: Qiang Zhao @ 2020-05-20 4:02 UTC (permalink / raw)
To: shawnguo; +Cc: leoyang.li, devicetree, linux-kernel, Zhao Qiang
From: Zhao Qiang <qiang.zhao@nxp.com>
Add ds26522 node to fsl-ls1043a-rdb.dts
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
v3:
- use "arm64: dts:" format for subject
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index 44d9343..1cb265f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -94,6 +94,22 @@
reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
};
+
+ slic@2 {
+ compatible = "maxim,ds26522";
+ reg = <2>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
+
+ slic@3 {
+ compatible = "maxim,ds26522";
+ reg = <3>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
};
&duart0 {
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v3 1/2] arm64: dts: add qe node to ls1043ardb
2020-05-20 4:02 [PATCH v3 1/2] arm64: dts: add qe node to ls1043ardb Qiang Zhao
2020-05-20 4:02 ` [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts " Qiang Zhao
@ 2020-05-20 15:01 ` Shawn Guo
1 sibling, 0 replies; 4+ messages in thread
From: Shawn Guo @ 2020-05-20 15:01 UTC (permalink / raw)
To: Qiang Zhao; +Cc: leoyang.li, devicetree, linux-kernel
On Wed, May 20, 2020 at 12:02:20PM +0800, Qiang Zhao wrote:
> From: Zhao Qiang <qiang.zhao@nxp.com>
>
> Add qe node to fsl-ls1043a.dtsi and fsl-ls1043a-rdb.dts
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Applied both, thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts to ls1043ardb
2020-05-20 4:02 ` [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts " Qiang Zhao
@ 2020-05-22 19:38 ` Li Yang
0 siblings, 0 replies; 4+ messages in thread
From: Li Yang @ 2020-05-22 19:38 UTC (permalink / raw)
To: Qiang Zhao
Cc: Shawn Guo,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, lkml
On Tue, May 19, 2020 at 11:08 PM Qiang Zhao <qiang.zhao@nxp.com> wrote:
>
> From: Zhao Qiang <qiang.zhao@nxp.com>
Maybe remove the duplicated dts in the title?
>
> Add ds26522 node to fsl-ls1043a-rdb.dts
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---
> v3:
> - use "arm64: dts:" format for subject
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> index 44d9343..1cb265f 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> @@ -94,6 +94,22 @@
> reg = <0>;
> spi-max-frequency = <1000000>; /* input clock */
> };
> +
> + slic@2 {
If this is a plugin card for the board, will this cause any problem
when the card is not plugged in?
> + compatible = "maxim,ds26522";
> + reg = <2>;
> + spi-max-frequency = <2000000>;
> + fsl,spi-cs-sck-delay = <100>;
> + fsl,spi-sck-cs-delay = <50>;
> + };
> +
> + slic@3 {
> + compatible = "maxim,ds26522";
> + reg = <3>;
> + spi-max-frequency = <2000000>;
> + fsl,spi-cs-sck-delay = <100>;
> + fsl,spi-sck-cs-delay = <50>;
> + };
> };
>
> &duart0 {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-05-22 19:39 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2020-05-20 4:02 [PATCH v3 1/2] arm64: dts: add qe node to ls1043ardb Qiang Zhao
2020-05-20 4:02 ` [PATCH v3 2/2] arm64: dts: Add ds26522 node to dts " Qiang Zhao
2020-05-22 19:38 ` Li Yang
2020-05-20 15:01 ` [PATCH v3 1/2] arm64: dts: add qe node " Shawn Guo
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