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From: Lai Jiangshan <laijs@linux.alibaba.com>
To: linux-kernel@vger.kernel.org
Cc: Lai Jiangshan <laijs@linux.alibaba.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	x86@kernel.org, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>, "H. Peter Anvin" <hpa@zytor.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Juergen Gross <jgross@suse.com>, Brian Gerst <brgerst@gmail.com>
Subject: [RFC PATCH V2 5/7] x86/entry: don't shift stack on #DB
Date: Tue, 26 May 2020 01:42:19 +0000
Message-ID: <20200526014221.2119-6-laijs@linux.alibaba.com> (raw)
In-Reply-To: <20200526014221.2119-1-laijs@linux.alibaba.com>

debug_enter() will disable #DB, there should be no recursive #DB.

Cc: Andy Lutomirski <luto@kernel.org>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
---
 arch/x86/entry/entry_64.S        | 17 -----------------
 arch/x86/kernel/asm-offsets_64.c |  1 -
 2 files changed, 18 deletions(-)

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 265ff97b3961..8ecaeee53653 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -396,11 +396,6 @@ SYM_CODE_END(\asmsym)
 	idtentry \vector asm_\cfunc \cfunc has_error_code=0
 .endm
 
-/*
- * MCE and DB exceptions
- */
-#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + (x) * 8)
-
 /**
  * idtentry_mce_db - Macro to generate entry stubs for #MC and #DB
  * @vector:		Vector number
@@ -416,10 +411,6 @@ SYM_CODE_END(\asmsym)
  * If hits in kernel mode then it needs to go through the paranoid
  * entry as the exception can hit any random state. No preemption
  * check on exit to keep the paranoid path simple.
- *
- * If the trap is #DB then the interrupt stack entry in the IST is
- * moved to the second stack, so a potential recursion will have a
- * fresh IST.
  */
 .macro idtentry_mce_db vector asmsym cfunc
 SYM_CODE_START(\asmsym)
@@ -445,16 +436,8 @@ SYM_CODE_START(\asmsym)
 
 	movq	%rsp, %rdi		/* pt_regs pointer */
 
-	.if \vector == X86_TRAP_DB
-		subq	$DB_STACK_OFFSET, CPU_TSS_IST(IST_INDEX_DB)
-	.endif
-
 	call	\cfunc
 
-	.if \vector == X86_TRAP_DB
-		addq	$DB_STACK_OFFSET, CPU_TSS_IST(IST_INDEX_DB)
-	.endif
-
 	jmp	paranoid_exit
 
 	/* Switch to the regular task stack and use the noist entry point */
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index c2a47016f243..472378330169 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -57,7 +57,6 @@ int main(void)
 	BLANK();
 #undef ENTRY
 
-	OFFSET(TSS_ist, tss_struct, x86_tss.ist);
 	DEFINE(DB_STACK_OFFSET, offsetof(struct cea_exception_stacks, DB_stack) -
 	       offsetof(struct cea_exception_stacks, DB1_stack));
 	BLANK();
-- 
2.20.1


  parent reply index

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-25 14:50 [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Lai Jiangshan
2020-05-25 14:50 ` [RFC PATCH 1/5] x86/hw_breakpoint: add within_area() to check data breakpoints Lai Jiangshan
2020-05-25 14:50 ` [RFC PATCH 2/5] x86/hw_breakpoint: Prevent data breakpoints on direct GDT Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 3/5] x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 4/5] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask Lai Jiangshan
2020-05-25 14:51 ` [RFC PATCH 5/5] x86/hw_breakpoint: Prevent data breakpoints on debug_idt_table Lai Jiangshan
2020-05-25 15:25 ` [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Peter Zijlstra
2020-05-26  1:42   ` [RFC PATCH V2 0/7] x86/DB: protects more cpu entry data and Lai Jiangshan
2020-05-26  1:42     ` [RFC PATCH V2 1/7] x86/hw_breakpoint: add within_area() to check data breakpoints Lai Jiangshan
2020-05-30  9:57       ` [tip: x86/entry] x86/hw_breakpoint: Add " tip-bot2 for Lai Jiangshan
2020-05-26  1:42     ` [RFC PATCH V2 2/7] x86/hw_breakpoint: Prevent data breakpoints on direct GDT Lai Jiangshan
2020-05-30  9:57       ` [tip: x86/entry] " tip-bot2 for Lai Jiangshan
2020-05-26  1:42     ` [RFC PATCH V2 3/7] x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw Lai Jiangshan
2020-05-30  9:57       ` [tip: x86/entry] " tip-bot2 for Lai Jiangshan
2020-05-26  1:42     ` [RFC PATCH V2 4/7] x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask Lai Jiangshan
2020-05-26  4:17       ` Andy Lutomirski
2020-05-26  4:31         ` Lai Jiangshan
2020-05-26  4:38           ` Andy Lutomirski
2020-05-26  5:48             ` Lai Jiangshan
2020-05-30  9:57       ` [tip: x86/entry] " tip-bot2 for Lai Jiangshan
2020-05-26  1:42     ` Lai Jiangshan [this message]
2020-05-26  9:10       ` [RFC PATCH V2 5/7] x86/entry: don't shift stack on #DB Peter Zijlstra
2020-05-26  1:42     ` [RFC PATCH V2 6/7] x86/entry: is_debug_stack() don't check of DB1 stack Lai Jiangshan
2020-05-26  1:42     ` [RFC PATCH V2 7/7] x86/entry: remove DB1 stack and DB2 hole from cpu entry area Lai Jiangshan
2020-05-26  1:48   ` [RFC PATCH 0/5] x86/hw_breakpoint: protects more cpu entry data Lai Jiangshan

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