* Re: [PATCH] x86/msr: Lift AMD family 0x15 power-specific MSRs
@ 2020-06-08 18:04 Guenter Roeck
0 siblings, 0 replies; 2+ messages in thread
From: Guenter Roeck @ 2020-06-08 18:04 UTC (permalink / raw)
To: Borislav Petkov; +Cc: X86 ML, Huang Rui, linux-hwmon, LKML
On Mon, Jun 08, 2020 at 06:48:47PM +0200, Borislav Petkov wrote:
> From: Borislav Petkov <bp@suse.de>
>
> ... into the global msr-index.h header because they're used in multiple
> compilation units. Sort the MSR list a bit. Update the msr-index.h copy
> in tools.
>
> No functional changes.
>
> Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> arch/x86/events/amd/power.c | 4 ----
> arch/x86/include/asm/msr-index.h | 5 ++++-
> drivers/hwmon/fam15h_power.c | 4 ----
> tools/arch/x86/include/asm/msr-index.h | 5 ++++-
> 4 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/events/amd/power.c b/arch/x86/events/amd/power.c
> index 43b09e9c93a2..16a2369c586e 100644
> --- a/arch/x86/events/amd/power.c
> +++ b/arch/x86/events/amd/power.c
> @@ -13,10 +13,6 @@
> #include <asm/cpu_device_id.h>
> #include "../perf_event.h"
>
> -#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
> -#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
> -#define MSR_F15H_PTSC 0xc0010280
> -
> /* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */
> #define AMD_POWER_EVENT_MASK 0xFFULL
>
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index ef452b817f44..7dfd45bb6cdb 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -414,15 +414,18 @@
> #define MSR_AMD64_PATCH_LEVEL 0x0000008b
> #define MSR_AMD64_TSC_RATIO 0xc0000104
> #define MSR_AMD64_NB_CFG 0xc001001f
> -#define MSR_AMD64_CPUID_FN_1 0xc0011004
> #define MSR_AMD64_PATCH_LOADER 0xc0010020
> #define MSR_AMD_PERF_CTL 0xc0010062
> #define MSR_AMD_PERF_STATUS 0xc0010063
> #define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
> +#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
> +#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
> #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
> #define MSR_AMD64_OSVW_STATUS 0xc0010141
> +#define MSR_F15H_PTSC 0xc0010280
> #define MSR_AMD_PPIN_CTL 0xc00102f0
> #define MSR_AMD_PPIN 0xc00102f1
> +#define MSR_AMD64_CPUID_FN_1 0xc0011004
> #define MSR_AMD64_LS_CFG 0xc0011020
> #define MSR_AMD64_DC_CFG 0xc0011022
> #define MSR_AMD64_BU_CFG2 0xc001102a
> diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
> index 267eac00a3fb..29f5fed28c2a 100644
> --- a/drivers/hwmon/fam15h_power.c
> +++ b/drivers/hwmon/fam15h_power.c
> @@ -41,10 +41,6 @@ MODULE_LICENSE("GPL");
> /* set maximum interval as 1 second */
> #define MAX_INTERVAL 1000
>
> -#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
> -#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
> -#define MSR_F15H_PTSC 0xc0010280
> -
> #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
>
> struct fam15h_power_data {
> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> index ef452b817f44..7dfd45bb6cdb 100644
> --- a/tools/arch/x86/include/asm/msr-index.h
> +++ b/tools/arch/x86/include/asm/msr-index.h
> @@ -414,15 +414,18 @@
> #define MSR_AMD64_PATCH_LEVEL 0x0000008b
> #define MSR_AMD64_TSC_RATIO 0xc0000104
> #define MSR_AMD64_NB_CFG 0xc001001f
> -#define MSR_AMD64_CPUID_FN_1 0xc0011004
> #define MSR_AMD64_PATCH_LOADER 0xc0010020
> #define MSR_AMD_PERF_CTL 0xc0010062
> #define MSR_AMD_PERF_STATUS 0xc0010063
> #define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
> +#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
> +#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
> #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
> #define MSR_AMD64_OSVW_STATUS 0xc0010141
> +#define MSR_F15H_PTSC 0xc0010280
> #define MSR_AMD_PPIN_CTL 0xc00102f0
> #define MSR_AMD_PPIN 0xc00102f1
> +#define MSR_AMD64_CPUID_FN_1 0xc0011004
> #define MSR_AMD64_LS_CFG 0xc0011020
> #define MSR_AMD64_DC_CFG 0xc0011022
> #define MSR_AMD64_BU_CFG2 0xc001102a
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 2+ messages in thread* [PATCH] x86/msr: Lift AMD family 0x15 power-specific MSRs
@ 2020-06-08 16:48 Borislav Petkov
0 siblings, 0 replies; 2+ messages in thread
From: Borislav Petkov @ 2020-06-08 16:48 UTC (permalink / raw)
To: X86 ML; +Cc: Huang Rui, linux-hwmon, LKML
From: Borislav Petkov <bp@suse.de>
... into the global msr-index.h header because they're used in multiple
compilation units. Sort the MSR list a bit. Update the msr-index.h copy
in tools.
No functional changes.
Signed-off-by: Borislav Petkov <bp@suse.de>
---
arch/x86/events/amd/power.c | 4 ----
arch/x86/include/asm/msr-index.h | 5 ++++-
drivers/hwmon/fam15h_power.c | 4 ----
tools/arch/x86/include/asm/msr-index.h | 5 ++++-
4 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/x86/events/amd/power.c b/arch/x86/events/amd/power.c
index 43b09e9c93a2..16a2369c586e 100644
--- a/arch/x86/events/amd/power.c
+++ b/arch/x86/events/amd/power.c
@@ -13,10 +13,6 @@
#include <asm/cpu_device_id.h>
#include "../perf_event.h"
-#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
-#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
-#define MSR_F15H_PTSC 0xc0010280
-
/* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */
#define AMD_POWER_EVENT_MASK 0xFFULL
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index ef452b817f44..7dfd45bb6cdb 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -414,15 +414,18 @@
#define MSR_AMD64_PATCH_LEVEL 0x0000008b
#define MSR_AMD64_TSC_RATIO 0xc0000104
#define MSR_AMD64_NB_CFG 0xc001001f
-#define MSR_AMD64_CPUID_FN_1 0xc0011004
#define MSR_AMD64_PATCH_LOADER 0xc0010020
#define MSR_AMD_PERF_CTL 0xc0010062
#define MSR_AMD_PERF_STATUS 0xc0010063
#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
+#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
+#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
#define MSR_AMD64_OSVW_STATUS 0xc0010141
+#define MSR_F15H_PTSC 0xc0010280
#define MSR_AMD_PPIN_CTL 0xc00102f0
#define MSR_AMD_PPIN 0xc00102f1
+#define MSR_AMD64_CPUID_FN_1 0xc0011004
#define MSR_AMD64_LS_CFG 0xc0011020
#define MSR_AMD64_DC_CFG 0xc0011022
#define MSR_AMD64_BU_CFG2 0xc001102a
diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
index 267eac00a3fb..29f5fed28c2a 100644
--- a/drivers/hwmon/fam15h_power.c
+++ b/drivers/hwmon/fam15h_power.c
@@ -41,10 +41,6 @@ MODULE_LICENSE("GPL");
/* set maximum interval as 1 second */
#define MAX_INTERVAL 1000
-#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
-#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
-#define MSR_F15H_PTSC 0xc0010280
-
#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
struct fam15h_power_data {
diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
index ef452b817f44..7dfd45bb6cdb 100644
--- a/tools/arch/x86/include/asm/msr-index.h
+++ b/tools/arch/x86/include/asm/msr-index.h
@@ -414,15 +414,18 @@
#define MSR_AMD64_PATCH_LEVEL 0x0000008b
#define MSR_AMD64_TSC_RATIO 0xc0000104
#define MSR_AMD64_NB_CFG 0xc001001f
-#define MSR_AMD64_CPUID_FN_1 0xc0011004
#define MSR_AMD64_PATCH_LOADER 0xc0010020
#define MSR_AMD_PERF_CTL 0xc0010062
#define MSR_AMD_PERF_STATUS 0xc0010063
#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
+#define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
+#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
#define MSR_AMD64_OSVW_STATUS 0xc0010141
+#define MSR_F15H_PTSC 0xc0010280
#define MSR_AMD_PPIN_CTL 0xc00102f0
#define MSR_AMD_PPIN 0xc00102f1
+#define MSR_AMD64_CPUID_FN_1 0xc0011004
#define MSR_AMD64_LS_CFG 0xc0011020
#define MSR_AMD64_DC_CFG 0xc0011022
#define MSR_AMD64_BU_CFG2 0xc001102a
--
2.21.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2020-06-08 16:48 Borislav Petkov
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