* [PATCH v1 0/2] usb : phy: Add USB PHY support on Intel LGM SoC
@ 2020-06-09 11:08 Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 1/2] dt-bindings: usb: Add USB PHY support for " Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
0 siblings, 2 replies; 8+ messages in thread
From: Ramuthevar,Vadivel MuruganX @ 2020-06-09 11:08 UTC (permalink / raw)
To: linux-kernel, balbi
Cc: gregkh, robh, devicetree, p.zabel, linux-usb, cheol.yong.kim,
qi-ming.wu, yin1.li, andriy.shevchenko,
Ramuthevar,Vadivel MuruganX
The USB PHY provides the optimized for low power dissipation while active, idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable
Ramuthevar Vadivel Murugan (2):
dt-bindings: usb: Add USB PHY support for Intel LGM SoC
usb: phy: Add USB3 PHY support for Intel LGM SoC
.../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++++
drivers/usb/phy/Kconfig | 11 +
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/phy-lgm-usb.c | 269 +++++++++++++++++++++
4 files changed, 334 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
create mode 100644 drivers/usb/phy/phy-lgm-usb.c
--
2.11.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 1/2] dt-bindings: usb: Add USB PHY support for Intel LGM SoC
2020-06-09 11:08 [PATCH v1 0/2] usb : phy: Add USB PHY support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
@ 2020-06-09 11:08 ` Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
1 sibling, 0 replies; 8+ messages in thread
From: Ramuthevar,Vadivel MuruganX @ 2020-06-09 11:08 UTC (permalink / raw)
To: linux-kernel, balbi
Cc: gregkh, robh, devicetree, p.zabel, linux-usb, cheol.yong.kim,
qi-ming.wu, yin1.li, andriy.shevchenko,
Ramuthevar Vadivel Murugan
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Add the dt-schema to support USB PHY on Intel LGM SoC
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
.../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
diff --git a/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml b/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
new file mode 100644
index 000000000000..0fc76cd23774
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/intel,lgm-usb-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel LGM USB PHY Device Tree Bindings
+
+maintainers:
+ - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com>
+
+properties:
+ compatible:
+ const: intel,lgm-usb-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ items:
+ - description: USB PHY and Host controller reset
+ - description: APB BUS reset
+ - description: General Hardware reset
+
+ reset-names:
+ items:
+ - const: phy
+ - const: apb
+ - const: phy31
+
+required:
+ - compatible
+ - clocks
+ - reg
+ - resets
+ - reset-names
+
+additionalProperties: false
+
+examples:
+ - |
+ usb_phy: usb_phy@e7e00000 {
+ compatible = "intel,lgm-usb-phy";
+ reg = <0xe7e00000 0x10000>;
+ clocks = <&cgu0 153>;
+ resets = <&rcu 0x70 0x24>,
+ <&rcu 0x70 0x26>,
+ <&rcu 0x70 0x28>;
+ reset-names = "phy", "apb", "phy31";
+ };
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 11:08 [PATCH v1 0/2] usb : phy: Add USB PHY support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 1/2] dt-bindings: usb: Add USB PHY support for " Ramuthevar,Vadivel MuruganX
@ 2020-06-09 11:08 ` Ramuthevar,Vadivel MuruganX
2020-06-09 12:14 ` Philipp Zabel
` (2 more replies)
1 sibling, 3 replies; 8+ messages in thread
From: Ramuthevar,Vadivel MuruganX @ 2020-06-09 11:08 UTC (permalink / raw)
To: linux-kernel, balbi
Cc: gregkh, robh, devicetree, p.zabel, linux-usb, cheol.yong.kim,
qi-ming.wu, yin1.li, andriy.shevchenko,
Ramuthevar Vadivel Murugan
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Add support for USB PHY on Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
drivers/usb/phy/Kconfig | 11 ++
drivers/usb/phy/Makefile | 1 +
drivers/usb/phy/phy-lgm-usb.c | 269 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 281 insertions(+)
create mode 100644 drivers/usb/phy/phy-lgm-usb.c
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 4b3fa78995cf..95f2e737d663 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -192,4 +192,15 @@ config JZ4770_PHY
This driver provides PHY support for the USB controller found
on the JZ4770 SoC from Ingenic.
+config USB_LGM_PHY
+ tristate "INTEL Lightning Mountain USB PHY Driver"
+ depends on USB_SUPPORT
+ select USB_PHY
+ select REGULATOR
+ select REGULATOR_FIXED_VOLTAGE
+ help
+ Enable this to support Intel DWC3 PHY USB phy. This driver provides
+ interface to interact with USB GEN-II and USB 3.x PHY that is part
+ of the Intel network SOC.
+
endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b352bdbe8712..ef5345164e10 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o
obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
obj-$(CONFIG_JZ4770_PHY) += phy-jz4770.o
+obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
diff --git a/drivers/usb/phy/phy-lgm-usb.c b/drivers/usb/phy/phy-lgm-usb.c
new file mode 100644
index 000000000000..66cb327b7b71
--- /dev/null
+++ b/drivers/usb/phy/phy-lgm-usb.c
@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel LGM USB PHY driver
+ *
+ * Copyright (C) 2020 Intel Corporation.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/reset.h>
+#include <linux/usb/phy.h>
+#include <linux/workqueue.h>
+
+#define CTRL1_OFFSET 0x14
+#define SRAM_EXT_LD_DONE BIT(25)
+#define SRAM_INIT_DONE BIT(26)
+
+#define TCPC_OFFSET 0x1014
+#define TCPC_MUX_CTL GENMASK(1, 0)
+#define MUX_NC 0
+#define MUX_USB 1
+#define MUX_DP 2
+#define MUX_USBDP 3
+#define TCPC_FLIPPED BIT(2)
+#define TCPC_LOW_POWER_EN BIT(3)
+#define TCPC_VALID BIT(4)
+#define TCPC_DISCONN \
+ (TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)
+
+static const char *const PHY_RESETS[] = { "phy31", "phy", };
+static const char *const CTL_RESETS[] = { "apb", "ctrl", };
+
+struct tca_apb {
+ struct reset_control *resets[ARRAY_SIZE(PHY_RESETS)];
+ struct regulator *vbus;
+ struct work_struct wk;
+ struct usb_phy phy;
+
+ bool phy_initialized;
+ bool connected;
+};
+
+static int get_flipped(struct tca_apb *ta, bool *flipped)
+{
+ union extcon_property_value property;
+ int ret;
+
+ ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
+ EXTCON_PROP_USB_TYPEC_POLARITY, &property);
+ if (ret) {
+ dev_err(ta->phy.dev, "no polarity property from extcon\n");
+ return false;
+ }
+
+ *flipped = property.intval;
+
+ return *flipped;
+}
+
+static int phy_init(struct usb_phy *phy)
+{
+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+ void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
+ int val, ret, i;
+
+ if (ta->phy_initialized)
+ return 0;
+
+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
+ reset_control_deassert(ta->resets[i]);
+
+ ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
+ 10, 10 * 1000);
+ if (IS_ERR(ret)) {
+ dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
+ return PTR_ERR(ret);
+ }
+
+ writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
+
+ ta->phy_initialized = true;
+ if (!ta->phy.edev)
+ return phy->set_vbus(phy, true);
+
+ schedule_work(&ta->wk);
+
+ return 0;
+}
+
+static void phy_shutdown(struct usb_phy *phy)
+{
+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+ int i;
+
+ if (!ta->phy_initialized)
+ return;
+
+ ta->phy_initialized = false;
+ flush_work(&ta->wk);
+ ta->phy.set_vbus(&ta->phy, false);
+ if (ta->connected) {
+ ta->connected = false;
+ writel(TCPC_DISCONN, ta->phy.io_priv + TCPC_OFFSET);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
+ reset_control_assert(ta->resets[i]);
+}
+
+static int phy_set_vbus(struct usb_phy *phy, int on)
+{
+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+ int ret = 0;
+
+ if (on) {
+ ret = regulator_enable(ta->vbus);
+ if (ret)
+ dev_err(ta->phy.dev, "regulator not enabled\n");
+ } else {
+ ret = regulator_disable(ta->vbus);
+ if (ret)
+ dev_err(ta->phy.dev, "regulator not disabled\n");
+ }
+
+ return ret;
+}
+
+static void tca_work(struct work_struct *work)
+{
+ struct tca_apb *ta = container_of(work, struct tca_apb, wk);
+ union extcon_property_value property;
+ bool connected;
+ bool flipped;
+ u32 val;
+ int ret;
+
+ ret = get_flipped(ta, &flipped);
+ if (!ret)
+ dev_err(ta->phy.dev, "no polarity property from extcon\n");
+
+ connected = extcon_get_state(ta->phy.edev, EXTCON_USB_HOST);
+ if (connected == ta->connected)
+ return;
+
+ ta->connected = connected;
+ if (connected) {
+ val = TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB);
+ if (flipped)
+ val |= TCPC_FLIPPED;
+ dev_info(ta->phy.dev, "connected%s\n", flipped ? " flipped" : "");
+ } else {
+ val = TCPC_DISCONN;
+ dev_info(ta->phy.dev, "disconnected\n");
+ }
+
+ writel(val, ta->phy.io_priv + TCPC_OFFSET);
+
+ if (ta->phy.set_vbus(&ta->phy, connected))
+ dev_err(ta->phy.dev, "failed to set VBUS\n");
+}
+
+static int id_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
+{
+ struct tca_apb *ta = container_of(nb, struct tca_apb, phy.id_nb);
+
+ if (ta->phy_initialized)
+ schedule_work(&ta->wk);
+
+ return NOTIFY_DONE;
+}
+
+static int vbus_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
+{
+ return NOTIFY_DONE;
+}
+
+static int phy_probe(struct platform_device *pdev)
+{
+ struct reset_control *resets[ARRAY_SIZE(CTL_RESETS)];
+ struct device *dev = &pdev->dev;
+ struct usb_phy *phy;
+ struct tca_apb *ta;
+ int i;
+
+ ta = devm_kzalloc(dev, sizeof(*ta), GFP_KERNEL);
+ if (!ta)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, ta);
+ INIT_WORK(&ta->wk, tca_work);
+
+ phy = &ta->phy;
+ phy->dev = dev;
+ phy->label = dev_name(dev);
+ phy->type = USB_PHY_TYPE_USB3;
+ phy->init = phy_init;
+ phy->shutdown = phy_shutdown;
+ phy->set_vbus = phy_set_vbus;
+ phy->id_nb.notifier_call = id_notifier;
+ phy->vbus_nb.notifier_call = vbus_notifier;
+
+ phy->io_priv = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(phy->io_priv))
+ return PTR_ERR(phy->io_priv);
+
+ ta->vbus = devm_regulator_get(dev, "vbus");
+ if (IS_ERR(ta->vbus))
+ return PTR_ERR(ta->vbus);
+
+ for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
+ resets[i] = devm_reset_control_get(dev, CTL_RESETS[i]);
+ if (IS_ERR(resets[i])) {
+ dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
+ return PTR_ERR(resets[i]);
+ }
+ reset_control_assert(resets[i]);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
+ ta->resets[i] = devm_reset_control_get(dev, PHY_RESETS[i]);
+ if (IS_ERR(ta->resets[i])) {
+ dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
+ return PTR_ERR(ta->resets[i]);
+ }
+ reset_control_assert(ta->resets[i]);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
+ reset_control_deassert(resets[i]);
+ /* Need to wait at least 20us before de-assert the PHY */
+ usleep_range(20, 100);
+
+ return usb_add_phy_dev(phy);
+}
+
+static int phy_remove(struct platform_device *pdev)
+{
+ struct tca_apb *ta = platform_get_drvdata(pdev);
+
+ usb_remove_phy(&ta->phy);
+
+ return 0;
+}
+
+static const struct of_device_id intel_usb_phy_dt_ids[] = {
+ { .compatible = "intel,lgm-usb-phy" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, intel_usb_phy_dt_ids);
+
+static struct platform_driver lgm_phy_driver = {
+ .driver = {
+ .name = "lgm-usb-phy",
+ .of_match_table = intel_usb_phy_dt_ids,
+ },
+ .probe = phy_probe,
+ .remove = phy_remove,
+};
+
+module_platform_driver(lgm_phy_driver);
+
+MODULE_DESCRIPTION("Intel LGM USB PHY driver");
+MODULE_AUTHOR("Li Yin <yin1.li@intel.com>");
+MODULE_LICENSE("GPL v2");
--
2.11.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
@ 2020-06-09 12:14 ` Philipp Zabel
2020-06-10 1:06 ` Ramuthevar, Vadivel MuruganX
2020-06-10 2:11 ` Ramuthevar, Vadivel MuruganX
2020-06-09 13:11 ` kernel test robot
2020-06-09 17:10 ` kernel test robot
2 siblings, 2 replies; 8+ messages in thread
From: Philipp Zabel @ 2020-06-09 12:14 UTC (permalink / raw)
To: Ramuthevar,Vadivel MuruganX, linux-kernel, balbi
Cc: gregkh, robh, devicetree, linux-usb, cheol.yong.kim, qi-ming.wu,
yin1.li, andriy.shevchenko
Hi Ramuthevar,
On Tue, 2020-06-09 at 19:08 +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>
> Add support for USB PHY on Intel LGM SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> ---
> drivers/usb/phy/Kconfig | 11 ++
> drivers/usb/phy/Makefile | 1 +
> drivers/usb/phy/phy-lgm-usb.c | 269 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 281 insertions(+)
> create mode 100644 drivers/usb/phy/phy-lgm-usb.c
>
> diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
> index 4b3fa78995cf..95f2e737d663 100644
> --- a/drivers/usb/phy/Kconfig
> +++ b/drivers/usb/phy/Kconfig
> @@ -192,4 +192,15 @@ config JZ4770_PHY
> This driver provides PHY support for the USB controller found
> on the JZ4770 SoC from Ingenic.
>
> +config USB_LGM_PHY
> + tristate "INTEL Lightning Mountain USB PHY Driver"
> + depends on USB_SUPPORT
> + select USB_PHY
> + select REGULATOR
> + select REGULATOR_FIXED_VOLTAGE
> + help
> + Enable this to support Intel DWC3 PHY USB phy. This driver provides
> + interface to interact with USB GEN-II and USB 3.x PHY that is part
> + of the Intel network SOC.
> +
> endmenu
> diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
> index b352bdbe8712..ef5345164e10 100644
> --- a/drivers/usb/phy/Makefile
> +++ b/drivers/usb/phy/Makefile
> @@ -25,3 +25,4 @@ obj-$(CONFIG_USB_ULPI) += phy-ulpi.o
> obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o
> obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o
> obj-$(CONFIG_JZ4770_PHY) += phy-jz4770.o
> +obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
> diff --git a/drivers/usb/phy/phy-lgm-usb.c b/drivers/usb/phy/phy-lgm-usb.c
> new file mode 100644
> index 000000000000..66cb327b7b71
> --- /dev/null
> +++ b/drivers/usb/phy/phy-lgm-usb.c
> @@ -0,0 +1,269 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Intel LGM USB PHY driver
> + *
> + * Copyright (C) 2020 Intel Corporation.
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/delay.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/reset.h>
> +#include <linux/usb/phy.h>
> +#include <linux/workqueue.h>
> +
> +#define CTRL1_OFFSET 0x14
> +#define SRAM_EXT_LD_DONE BIT(25)
> +#define SRAM_INIT_DONE BIT(26)
> +
> +#define TCPC_OFFSET 0x1014
> +#define TCPC_MUX_CTL GENMASK(1, 0)
> +#define MUX_NC 0
> +#define MUX_USB 1
> +#define MUX_DP 2
> +#define MUX_USBDP 3
> +#define TCPC_FLIPPED BIT(2)
> +#define TCPC_LOW_POWER_EN BIT(3)
> +#define TCPC_VALID BIT(4)
> +#define TCPC_DISCONN \
> + (TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)
> +
> +static const char *const PHY_RESETS[] = { "phy31", "phy", };
> +static const char *const CTL_RESETS[] = { "apb", "ctrl", };
> +
> +struct tca_apb {
> + struct reset_control *resets[ARRAY_SIZE(PHY_RESETS)];
> + struct regulator *vbus;
> + struct work_struct wk;
> + struct usb_phy phy;
> +
> + bool phy_initialized;
> + bool connected;
> +};
> +
> +static int get_flipped(struct tca_apb *ta, bool *flipped)
> +{
> + union extcon_property_value property;
> + int ret;
> +
> + ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
> + EXTCON_PROP_USB_TYPEC_POLARITY, &property);
> + if (ret) {
> + dev_err(ta->phy.dev, "no polarity property from extcon\n");
> + return false;
> + }
> +
> + *flipped = property.intval;
> +
> + return *flipped;
> +}
> +
> +static int phy_init(struct usb_phy *phy)
> +{
> + struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
> + void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
> + int val, ret, i;
> +
> + if (ta->phy_initialized)
> + return 0;
> +
> + for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
> + reset_control_deassert(ta->resets[i]);
> +
> + ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
> + 10, 10 * 1000);
> + if (IS_ERR(ret)) {
> + dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
> + return PTR_ERR(ret);
> + }
> +
> + writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
> +
> + ta->phy_initialized = true;
> + if (!ta->phy.edev)
> + return phy->set_vbus(phy, true);
> +
> + schedule_work(&ta->wk);
> +
> + return 0;
> +}
> +
> +static void phy_shutdown(struct usb_phy *phy)
> +{
> + struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
> + int i;
> +
> + if (!ta->phy_initialized)
> + return;
> +
> + ta->phy_initialized = false;
> + flush_work(&ta->wk);
> + ta->phy.set_vbus(&ta->phy, false);
> + if (ta->connected) {
> + ta->connected = false;
> + writel(TCPC_DISCONN, ta->phy.io_priv + TCPC_OFFSET);
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
> + reset_control_assert(ta->resets[i]);
> +}
> +
> +static int phy_set_vbus(struct usb_phy *phy, int on)
> +{
> + struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
> + int ret = 0;
> +
> + if (on) {
> + ret = regulator_enable(ta->vbus);
> + if (ret)
> + dev_err(ta->phy.dev, "regulator not enabled\n");
> + } else {
> + ret = regulator_disable(ta->vbus);
> + if (ret)
> + dev_err(ta->phy.dev, "regulator not disabled\n");
> + }
> +
> + return ret;
> +}
> +
> +static void tca_work(struct work_struct *work)
> +{
> + struct tca_apb *ta = container_of(work, struct tca_apb, wk);
> + union extcon_property_value property;
> + bool connected;
> + bool flipped;
> + u32 val;
> + int ret;
> +
> + ret = get_flipped(ta, &flipped);
> + if (!ret)
> + dev_err(ta->phy.dev, "no polarity property from extcon\n");
> +
> + connected = extcon_get_state(ta->phy.edev, EXTCON_USB_HOST);
> + if (connected == ta->connected)
> + return;
> +
> + ta->connected = connected;
> + if (connected) {
> + val = TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB);
> + if (flipped)
> + val |= TCPC_FLIPPED;
> + dev_info(ta->phy.dev, "connected%s\n", flipped ? " flipped" : "");
> + } else {
> + val = TCPC_DISCONN;
> + dev_info(ta->phy.dev, "disconnected\n");
> + }
> +
> + writel(val, ta->phy.io_priv + TCPC_OFFSET);
> +
> + if (ta->phy.set_vbus(&ta->phy, connected))
> + dev_err(ta->phy.dev, "failed to set VBUS\n");
> +}
> +
> +static int id_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
> +{
> + struct tca_apb *ta = container_of(nb, struct tca_apb, phy.id_nb);
> +
> + if (ta->phy_initialized)
> + schedule_work(&ta->wk);
> +
> + return NOTIFY_DONE;
> +}
> +
> +static int vbus_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
> +{
> + return NOTIFY_DONE;
> +}
> +
> +static int phy_probe(struct platform_device *pdev)
> +{
> + struct reset_control *resets[ARRAY_SIZE(CTL_RESETS)];
> + struct device *dev = &pdev->dev;
> + struct usb_phy *phy;
> + struct tca_apb *ta;
> + int i;
> +
> + ta = devm_kzalloc(dev, sizeof(*ta), GFP_KERNEL);
> + if (!ta)
> + return -ENOMEM;
> +
> + platform_set_drvdata(pdev, ta);
> + INIT_WORK(&ta->wk, tca_work);
> +
> + phy = &ta->phy;
> + phy->dev = dev;
> + phy->label = dev_name(dev);
> + phy->type = USB_PHY_TYPE_USB3;
> + phy->init = phy_init;
> + phy->shutdown = phy_shutdown;
> + phy->set_vbus = phy_set_vbus;
> + phy->id_nb.notifier_call = id_notifier;
> + phy->vbus_nb.notifier_call = vbus_notifier;
> +
> + phy->io_priv = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(phy->io_priv))
> + return PTR_ERR(phy->io_priv);
> +
> + ta->vbus = devm_regulator_get(dev, "vbus");
> + if (IS_ERR(ta->vbus))
> + return PTR_ERR(ta->vbus);
> +
> + for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
> + resets[i] = devm_reset_control_get(dev, CTL_RESETS[i]);
Please use devm_reset_control_get_exclusive() instead.
> + if (IS_ERR(resets[i])) {
> + dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
> + return PTR_ERR(resets[i]);
> + }
> + reset_control_assert(resets[i]);
> + }
You should request all reset controls first, and only then start
asserting / deasserting, otherwise you may end up with partially
asserted resets in case a later reset control is not found.
> +
> + for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
> + ta->resets[i] = devm_reset_control_get(dev, PHY_RESETS[i]);
Same as above.
> + if (IS_ERR(ta->resets[i])) {
> + dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
> + return PTR_ERR(ta->resets[i]);
> + }
> + reset_control_assert(ta->resets[i]);
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
> + reset_control_deassert(resets[i]);
> + /* Need to wait at least 20us before de-assert the PHY */
> + usleep_range(20, 100);
This waits 20us after de-asserting the reset, not before. Is this in the
correct place?
> + return usb_add_phy_dev(phy);
> +}
> +
> +static int phy_remove(struct platform_device *pdev)
> +{
> + struct tca_apb *ta = platform_get_drvdata(pdev);
> +
> + usb_remove_phy(&ta->phy);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id intel_usb_phy_dt_ids[] = {
> + { .compatible = "intel,lgm-usb-phy" },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, intel_usb_phy_dt_ids);
> +
> +static struct platform_driver lgm_phy_driver = {
> + .driver = {
> + .name = "lgm-usb-phy",
> + .of_match_table = intel_usb_phy_dt_ids,
> + },
> + .probe = phy_probe,
> + .remove = phy_remove,
> +};
> +
> +module_platform_driver(lgm_phy_driver);
> +
> +MODULE_DESCRIPTION("Intel LGM USB PHY driver");
> +MODULE_AUTHOR("Li Yin <yin1.li@intel.com>");
> +MODULE_LICENSE("GPL v2");
regards
Philipp
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
2020-06-09 12:14 ` Philipp Zabel
@ 2020-06-09 13:11 ` kernel test robot
2020-06-09 17:10 ` kernel test robot
2 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-06-09 13:11 UTC (permalink / raw)
To: Ramuthevar, Vadivel MuruganX, linux-kernel, balbi
Cc: kbuild-all, gregkh, robh, devicetree, p.zabel, linux-usb,
cheol.yong.kim, qi-ming.wu, yin1.li
[-- Attachment #1: Type: text/plain, Size: 3743 bytes --]
Hi "Ramuthevar,Vadivel,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on balbi-usb/testing/next]
[also build test WARNING on usb/usb-testing linus/master v5.7 next-20200608]
[cannot apply to linux/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-MuruganX/usb-phy-Add-USB-PHY-support-on-Intel-LGM-SoC/20200609-191216
base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git testing/next
config: sparc-allyesconfig (attached as .config)
compiler: sparc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=sparc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
drivers/usb/phy/phy-lgm-usb.c: In function 'phy_init':
>> drivers/usb/phy/phy-lgm-usb.c:79:13: warning: passing argument 1 of 'IS_ERR' makes pointer from integer without a cast [-Wint-conversion]
79 | if (IS_ERR(ret)) {
| ^~~
| |
| int
In file included from include/linux/io.h:12,
from include/linux/iopoll.h:14,
from drivers/usb/phy/phy-lgm-usb.c:10:
include/linux/err.h:34:60: note: expected 'const void *' but argument is of type 'int'
34 | static inline bool __must_check IS_ERR(__force const void *ptr)
| ~~~~~~~~~~~~^~~
>> drivers/usb/phy/phy-lgm-usb.c:81:18: warning: passing argument 1 of 'PTR_ERR' makes pointer from integer without a cast [-Wint-conversion]
81 | return PTR_ERR(ret);
| ^~~
| |
| int
In file included from include/linux/io.h:12,
from include/linux/iopoll.h:14,
from drivers/usb/phy/phy-lgm-usb.c:10:
include/linux/err.h:29:61: note: expected 'const void *' but argument is of type 'int'
29 | static inline long __must_check PTR_ERR(__force const void *ptr)
| ~~~~~~~~~~~~^~~
drivers/usb/phy/phy-lgm-usb.c: In function 'tca_work':
drivers/usb/phy/phy-lgm-usb.c:136:30: warning: unused variable 'property' [-Wunused-variable]
136 | union extcon_property_value property;
| ^~~~~~~~
vim +/IS_ERR +79 drivers/usb/phy/phy-lgm-usb.c
64
65 static int phy_init(struct usb_phy *phy)
66 {
67 struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
68 void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
69 int val, ret, i;
70
71 if (ta->phy_initialized)
72 return 0;
73
74 for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
75 reset_control_deassert(ta->resets[i]);
76
77 ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
78 10, 10 * 1000);
> 79 if (IS_ERR(ret)) {
80 dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
> 81 return PTR_ERR(ret);
82 }
83
84 writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
85
86 ta->phy_initialized = true;
87 if (!ta->phy.edev)
88 return phy->set_vbus(phy, true);
89
90 schedule_work(&ta->wk);
91
92 return 0;
93 }
94
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 62542 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
2020-06-09 12:14 ` Philipp Zabel
2020-06-09 13:11 ` kernel test robot
@ 2020-06-09 17:10 ` kernel test robot
2 siblings, 0 replies; 8+ messages in thread
From: kernel test robot @ 2020-06-09 17:10 UTC (permalink / raw)
To: Ramuthevar, Vadivel MuruganX, linux-kernel, balbi
Cc: kbuild-all, clang-built-linux, gregkh, robh, devicetree, p.zabel,
linux-usb, cheol.yong.kim, qi-ming.wu, yin1.li
[-- Attachment #1: Type: text/plain, Size: 3301 bytes --]
Hi "Ramuthevar,Vadivel,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on balbi-usb/testing/next]
[also build test WARNING on usb/usb-testing linus/master v5.7 next-20200608]
[cannot apply to linux/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-MuruganX/usb-phy-Add-USB-PHY-support-on-Intel-LGM-SoC/20200609-191216
base: https://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git testing/next
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project bc2b70982be8f5250cd0082a7190f8b417bd4dfe)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
>> drivers/usb/phy/phy-lgm-usb.c:79:13: warning: incompatible integer to pointer conversion passing 'int' to parameter of type 'const void *' [-Wint-conversion]
if (IS_ERR(ret)) {
^~~
include/linux/err.h:34:60: note: passing argument to parameter 'ptr' here
static inline bool __must_check IS_ERR(__force const void *ptr)
^
drivers/usb/phy/phy-lgm-usb.c:81:18: warning: incompatible integer to pointer conversion passing 'int' to parameter of type 'const void *' [-Wint-conversion]
return PTR_ERR(ret);
^~~
include/linux/err.h:29:61: note: passing argument to parameter 'ptr' here
static inline long __must_check PTR_ERR(__force const void *ptr)
^
drivers/usb/phy/phy-lgm-usb.c:136:30: warning: unused variable 'property' [-Wunused-variable]
union extcon_property_value property;
^
3 warnings generated.
vim +79 drivers/usb/phy/phy-lgm-usb.c
64
65 static int phy_init(struct usb_phy *phy)
66 {
67 struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
68 void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
69 int val, ret, i;
70
71 if (ta->phy_initialized)
72 return 0;
73
74 for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
75 reset_control_deassert(ta->resets[i]);
76
77 ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
78 10, 10 * 1000);
> 79 if (IS_ERR(ret)) {
80 dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
81 return PTR_ERR(ret);
82 }
83
84 writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
85
86 ta->phy_initialized = true;
87 if (!ta->phy.edev)
88 return phy->set_vbus(phy, true);
89
90 schedule_work(&ta->wk);
91
92 return 0;
93 }
94
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 73444 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 12:14 ` Philipp Zabel
@ 2020-06-10 1:06 ` Ramuthevar, Vadivel MuruganX
2020-06-10 2:11 ` Ramuthevar, Vadivel MuruganX
1 sibling, 0 replies; 8+ messages in thread
From: Ramuthevar, Vadivel MuruganX @ 2020-06-10 1:06 UTC (permalink / raw)
To: Philipp Zabel, linux-kernel, balbi
Cc: gregkh, robh, devicetree, linux-usb, cheol.yong.kim, qi-ming.wu,
yin1.li, andriy.shevchenko
Hi Philipp,
Thank you very much for review comments and your time...
On 9/6/2020 8:14 pm, Philipp Zabel wrote:
>> +
>> + for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
>> + resets[i] = devm_reset_control_get(dev, CTL_RESETS[i]);
> Please use devm_reset_control_get_exclusive() instead.
Noted, will use it.
>
>> + if (IS_ERR(resets[i])) {
>> + dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
>> + return PTR_ERR(resets[i]);
>> + }
>> + reset_control_assert(resets[i]);
>> + }
> You should request all reset controls first, and only then start
> asserting / deasserting, otherwise you may end up with partially
> asserted resets in case a later reset control is not found.
Agreed!, re-write the assert/de-assert logic as you have suggested.
>
>> +
>> + for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
>> + ta->resets[i] = devm_reset_control_get(dev, PHY_RESETS[i]);
> Same as above.
>
>> + if (IS_ERR(ta->resets[i])) {
>> + dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
>> + return PTR_ERR(ta->resets[i]);
>> + }
>> + reset_control_assert(ta->resets[i]);
>> + }
>> +
>> + for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
>> + reset_control_deassert(resets[i]);
>> + /* Need to wait at least 20us before de-assert the PHY */
>> + usleep_range(20, 100);
> This waits 20us after de-asserting the reset, not before. Is this in the
> correct place?
yes, you are right, it's in wrong place, Thanks!
Regards
Vadivel
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
2020-06-09 12:14 ` Philipp Zabel
2020-06-10 1:06 ` Ramuthevar, Vadivel MuruganX
@ 2020-06-10 2:11 ` Ramuthevar, Vadivel MuruganX
1 sibling, 0 replies; 8+ messages in thread
From: Ramuthevar, Vadivel MuruganX @ 2020-06-10 2:11 UTC (permalink / raw)
To: Philipp Zabel, linux-kernel, balbi
Cc: gregkh, robh, devicetree, linux-usb, cheol.yong.kim, qi-ming.wu,
yin1.li, andriy.shevchenko
Hi Philipp,
Thanks for the review comments...
On 9/6/2020 8:14 pm, Philipp Zabel wrote:
>> +
>> + for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
>> + reset_control_deassert(resets[i]);
>> + /* Need to wait at least 20us before de-assert the PHY */
>> + usleep_range(20, 100);
> This waits 20us after de-asserting the reset, not before. Is this in the
> correct place?
This is correct place , but the above mentioned comments are wrong, need
to re-write the comments as below...
/* out-of-band reset of the controller after PHY reset
* will cause controller malfunctioning, so should use in-bandcontroller
* reset only and leave the controller de-asserted here.
*/
for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
reset_control_deassert(resets[i]);
/* Need to wait at least 20us after de-assert the PHY */
usleep_range(20, 100);
Regards
Vadivel
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-06-10 2:11 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-09 11:08 [PATCH v1 0/2] usb : phy: Add USB PHY support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 1/2] dt-bindings: usb: Add USB PHY support for " Ramuthevar,Vadivel MuruganX
2020-06-09 11:08 ` [PATCH v1 2/2] usb: phy: Add USB3 " Ramuthevar,Vadivel MuruganX
2020-06-09 12:14 ` Philipp Zabel
2020-06-10 1:06 ` Ramuthevar, Vadivel MuruganX
2020-06-10 2:11 ` Ramuthevar, Vadivel MuruganX
2020-06-09 13:11 ` kernel test robot
2020-06-09 17:10 ` kernel test robot
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