* [PATCH] pinctrl: amd: fix npins for uart0 in kerncz_groups
@ 2020-06-16 1:50 Jacky Hu
2020-06-22 7:36 ` Linus Walleij
0 siblings, 1 reply; 2+ messages in thread
From: Jacky Hu @ 2020-06-16 1:50 UTC (permalink / raw)
To: linux-gpio; +Cc: linus.walleij, linux-kernel, Jacky Hu
uart0_pins is defined as:
static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};
which npins is wronly specified as 9 later
{
.name = "uart0",
.pins = uart0_pins,
.npins = 9,
},
npins should be 5 instead of 9 according to the definition.
Signed-off-by: Jacky Hu <hengqing.hu@gmail.com>
---
drivers/pinctrl/pinctrl-amd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h
index 3e5760f1a715..d4a192df5fab 100644
--- a/drivers/pinctrl/pinctrl-amd.h
+++ b/drivers/pinctrl/pinctrl-amd.h
@@ -252,7 +252,7 @@ static const struct amd_pingroup kerncz_groups[] = {
{
.name = "uart0",
.pins = uart0_pins,
- .npins = 9,
+ .npins = 5,
},
{
.name = "uart1",
--
2.27.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] pinctrl: amd: fix npins for uart0 in kerncz_groups
2020-06-16 1:50 [PATCH] pinctrl: amd: fix npins for uart0 in kerncz_groups Jacky Hu
@ 2020-06-22 7:36 ` Linus Walleij
0 siblings, 0 replies; 2+ messages in thread
From: Linus Walleij @ 2020-06-22 7:36 UTC (permalink / raw)
To: Jacky Hu; +Cc: open list:GPIO SUBSYSTEM, linux-kernel
On Tue, Jun 16, 2020 at 3:50 AM Jacky Hu <hengqing.hu@gmail.com> wrote:
> uart0_pins is defined as:
> static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};
>
> which npins is wronly specified as 9 later
> {
> .name = "uart0",
> .pins = uart0_pins,
> .npins = 9,
> },
>
> npins should be 5 instead of 9 according to the definition.
>
> Signed-off-by: Jacky Hu <hengqing.hu@gmail.com>
Seems like an obvious bug so patch applied for fixes.
Yours,
Linus Walleij
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