* [PATCH v6 1/9] mips: bmips: select ARCH_HAS_RESET_CONTROLLER
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 2/9] dt-bindings: reset: add BCM6345 reset controller bindings Álvaro Fernández Rojas
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
This allows to add reset controllers support.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes
v5: no changes
v4: no changes
v3: no changes
v2: no changes
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 6fee1a133e9d..b1840119cb64 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -227,6 +227,7 @@ config ATH79
config BMIPS_GENERIC
bool "Broadcom Generic BMIPS kernel"
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
select ARCH_HAS_PHYS_TO_DMA
select BOOT_RAW
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 2/9] dt-bindings: reset: add BCM6345 reset controller bindings
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 1/9] mips: bmips: select ARCH_HAS_RESET_CONTROLLER Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 3/9] reset: add BCM6345 reset controller driver Álvaro Fernández Rojas
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
Add device tree binding documentation for BCM6345 reset controller.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes
v5: no changes
v4: change license and fix maxItems.
v3: no changes
v2: no changes
.../bindings/reset/brcm,bcm6345-reset.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
new file mode 100644
index 000000000000..560cf6522cb8
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: BCM6345 reset controller
+
+description: This document describes the BCM6345 reset controller.
+
+maintainers:
+ - Álvaro Fernández Rojas <noltari@gmail.com>
+
+properties:
+ compatible:
+ const: brcm,bcm6345-reset
+
+ reg:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 3/9] reset: add BCM6345 reset controller driver
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 1/9] mips: bmips: select ARCH_HAS_RESET_CONTROLLER Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 2/9] dt-bindings: reset: add BCM6345 reset controller bindings Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 9:35 ` Philipp Zabel
2020-06-17 8:32 ` [PATCH v6 4/9] mips: bmips: dts: add BCM6328 reset controller support Álvaro Fernández Rojas
` (5 subsequent siblings)
8 siblings, 1 reply; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas, Florian Fainelli
Add support for resetting blocks through the Linux reset controller
subsystem for BCM63xx SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <F.fainelli@gmail.com>
---
v6: driver improvements:
- use devm_platform_ioremap_resource.
- simplify bcm6345_reset_probe return.
- introduce and use to_bcm6345_reset function.
v5: fix kbuild robot error (drop __init).
v4: no changes.
v3: using reset-simple isn't possible since sleeping after performing the
reset is also needed.
v2: add compatibility to reset-simple instead of adding a new driver.
drivers/reset/Kconfig | 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-bcm6345.c | 132 ++++++++++++++++++++++++++++++++++
3 files changed, 140 insertions(+)
create mode 100644 drivers/reset/reset-bcm6345.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d9efbfd29646..9f1da978cef6 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -41,6 +41,13 @@ config RESET_BERLIN
help
This enables the reset controller driver for Marvell Berlin SoCs.
+config RESET_BCM6345
+ bool "BCM6345 Reset Controller"
+ depends on BMIPS_GENERIC || COMPILE_TEST
+ default BMIPS_GENERIC
+ help
+ This enables the reset controller driver for BCM6345 SoCs.
+
config RESET_BRCMSTB
tristate "Broadcom STB reset controller"
depends on ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 249ed357c997..e642aae42f0f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
+obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
new file mode 100644
index 000000000000..3eedea226028
--- /dev/null
+++ b/drivers/reset/reset-bcm6345.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * BCM6345 Reset Controller Driver
+ *
+ * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mod_devicetable.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#define BCM6345_RESET_NUM 32
+#define BCM6345_RESET_SLEEP_MIN_US 10000
+#define BCM6345_RESET_SLEEP_MAX_US 20000
+
+struct bcm6345_reset {
+ struct reset_controller_dev rcdev;
+ void __iomem *base;
+ spinlock_t lock;
+};
+
+static inline struct bcm6345_reset *
+to_bcm6345_reset(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct bcm6345_reset, rcdev);
+}
+
+static void bcm6345_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev);
+ unsigned long flags;
+ uint32_t val;
+
+ spin_lock_irqsave(&bcm6345_reset->lock, flags);
+ val = __raw_readl(bcm6345_reset->base);
+ if (assert)
+ val &= ~BIT(id);
+ else
+ val |= BIT(id);
+ __raw_writel(val, bcm6345_reset->base);
+ spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
+}
+
+static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+
+ return 0;
+}
+
+static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, false);
+
+ return 0;
+}
+
+static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ bcm6345_reset_update(rcdev, id, true);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ bcm6345_reset_update(rcdev, id, false);
+ usleep_range(BCM6345_RESET_SLEEP_MIN_US,
+ BCM6345_RESET_SLEEP_MAX_US);
+
+ return 0;
+}
+
+static int bcm6345_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev);
+
+ return !(__raw_readl(bcm6345_reset->base) & BIT(id));
+}
+
+static struct reset_control_ops bcm6345_reset_ops = {
+ .assert = bcm6345_reset_assert,
+ .deassert = bcm6345_reset_deassert,
+ .reset = bcm6345_reset_reset,
+ .status = bcm6345_reset_status,
+};
+
+static int bcm6345_reset_probe(struct platform_device *pdev)
+{
+ struct bcm6345_reset *bcm6345_reset;
+
+ bcm6345_reset = devm_kzalloc(&pdev->dev,
+ sizeof(*bcm6345_reset), GFP_KERNEL);
+ if (!bcm6345_reset)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, bcm6345_reset);
+
+ bcm6345_reset->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(bcm6345_reset->base))
+ return PTR_ERR(bcm6345_reset->base);
+
+ spin_lock_init(&bcm6345_reset->lock);
+ bcm6345_reset->rcdev.ops = &bcm6345_reset_ops;
+ bcm6345_reset->rcdev.owner = THIS_MODULE;
+ bcm6345_reset->rcdev.of_node = pdev->dev.of_node;
+ bcm6345_reset->rcdev.of_reset_n_cells = 1;
+ bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM;
+
+ return devm_reset_controller_register(&pdev->dev,
+ &bcm6345_reset->rcdev);
+}
+
+static const struct of_device_id bcm6345_reset_of_match[] = {
+ { .compatible = "brcm,bcm6345-reset" },
+ { /* sentinel */ },
+};
+
+static struct platform_driver bcm6345_reset_driver = {
+ .probe = bcm6345_reset_probe,
+ .driver = {
+ .name = "bcm6345-reset",
+ .of_match_table = bcm6345_reset_of_match,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver(bcm6345_reset_driver);
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v6 3/9] reset: add BCM6345 reset controller driver
2020-06-17 8:32 ` [PATCH v6 3/9] reset: add BCM6345 reset controller driver Álvaro Fernández Rojas
@ 2020-06-17 9:35 ` Philipp Zabel
0 siblings, 0 replies; 11+ messages in thread
From: Philipp Zabel @ 2020-06-17 9:35 UTC (permalink / raw)
To: Álvaro Fernández Rojas, robh+dt, tsbogend, f.fainelli,
jonas.gorski, devicetree, linux-kernel, linux-mips,
bcm-kernel-feedback-list
Hi Álvaro,
thank you for the patch. A few comments below:
On Wed, 2020-06-17 at 10:32 +0200, Álvaro Fernández Rojas wrote:
> Add support for resetting blocks through the Linux reset controller
> subsystem for BCM63xx SoCs.
>
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Reviewed-by: Florian Fainelli <F.fainelli@gmail.com>
> ---
> v6: driver improvements:
> - use devm_platform_ioremap_resource.
> - simplify bcm6345_reset_probe return.
> - introduce and use to_bcm6345_reset function.
> v5: fix kbuild robot error (drop __init).
> v4: no changes.
> v3: using reset-simple isn't possible since sleeping after performing the
> reset is also needed.
> v2: add compatibility to reset-simple instead of adding a new driver.
>
> drivers/reset/Kconfig | 7 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-bcm6345.c | 132 ++++++++++++++++++++++++++++++++++
> 3 files changed, 140 insertions(+)
> create mode 100644 drivers/reset/reset-bcm6345.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index d9efbfd29646..9f1da978cef6 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -41,6 +41,13 @@ config RESET_BERLIN
> help
> This enables the reset controller driver for Marvell Berlin SoCs.
>
> +config RESET_BCM6345
> + bool "BCM6345 Reset Controller"
> + depends on BMIPS_GENERIC || COMPILE_TEST
> + default BMIPS_GENERIC
> + help
> + This enables the reset controller driver for BCM6345 SoCs.
> +
Please sort these alphabetically.
> config RESET_BRCMSTB
> tristate "Broadcom STB reset controller"
> depends on ARCH_BRCMSTB || COMPILE_TEST
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 249ed357c997..e642aae42f0f 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
> obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
> obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
> obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
> +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
This is the right place.
> obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
> obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
> obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
> diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
> new file mode 100644
> index 000000000000..3eedea226028
> --- /dev/null
> +++ b/drivers/reset/reset-bcm6345.c
> @@ -0,0 +1,132 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * BCM6345 Reset Controller Driver
> + *
> + * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com>
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/mod_devicetable.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +
> +#define BCM6345_RESET_NUM 32
> +#define BCM6345_RESET_SLEEP_MIN_US 10000
> +#define BCM6345_RESET_SLEEP_MAX_US 20000
> +
> +struct bcm6345_reset {
> + struct reset_controller_dev rcdev;
> + void __iomem *base;
> + spinlock_t lock;
> +};
> +
> +static inline struct bcm6345_reset *
> +to_bcm6345_reset(struct reset_controller_dev *rcdev)
> +{
> + return container_of(rcdev, struct bcm6345_reset, rcdev);
> +}
> +
> +static void bcm6345_reset_update(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> +{
> + struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev);
> + unsigned long flags;
> + uint32_t val;
> +
> + spin_lock_irqsave(&bcm6345_reset->lock, flags);
> + val = __raw_readl(bcm6345_reset->base);
> + if (assert)
> + val &= ~BIT(id);
> + else
> + val |= BIT(id);
> + __raw_writel(val, bcm6345_reset->base);
> + spin_unlock_irqrestore(&bcm6345_reset->lock, flags);
> +}
> +
> +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + bcm6345_reset_update(rcdev, id, true);
> +
> + return 0;
> +}
> +
> +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + bcm6345_reset_update(rcdev, id, false);
> +
> + return 0;
These two could be shortened if you let bcm6345_reset_update() return 0:
return bcm6345_reset_update(rcdev, id, false);
> +}
> +
> +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + bcm6345_reset_update(rcdev, id, true);
> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> + BCM6345_RESET_SLEEP_MAX_US);
> +
> + bcm6345_reset_update(rcdev, id, false);
This second sleep is unusual:
> + usleep_range(BCM6345_RESET_SLEEP_MIN_US,
> + BCM6345_RESET_SLEEP_MAX_US);
Could you add a comment describing why it is needed?
Otherwise,
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
regards
Philipp
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v6 4/9] mips: bmips: dts: add BCM6328 reset controller support
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (2 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 3/9] reset: add BCM6345 reset controller driver Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 5/9] mips: bmips: dts: add BCM6358 " Álvaro Fernández Rojas
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes.
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6328.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6328-reset.h | 18 ++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6328-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index af860d06def6..590118cf5c12 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -57,6 +57,12 @@ clkctl: clock-controller@10000004 {
#clock-cells = <1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6328-reset.h b/include/dt-bindings/reset/bcm6328-reset.h
new file mode 100644
index 000000000000..0f3df87d47af
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6328-reset.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6328_H
+#define __DT_BINDINGS_RESET_BCM6328_H
+
+#define BCM6328_RST_SPI 0
+#define BCM6328_RST_EPHY 1
+#define BCM6328_RST_SAR 2
+#define BCM6328_RST_ENETSW 3
+#define BCM6328_RST_USBS 4
+#define BCM6328_RST_USBH 5
+#define BCM6328_RST_PCM 6
+#define BCM6328_RST_PCIE_CORE 7
+#define BCM6328_RST_PCIE 8
+#define BCM6328_RST_PCIE_EXT 9
+#define BCM6328_RST_PCIE_HARD 10
+
+#endif /* __DT_BINDINGS_RESET_BCM6328_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 5/9] mips: bmips: dts: add BCM6358 reset controller support
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (3 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 4/9] mips: bmips: dts: add BCM6328 reset controller support Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 6/9] mips: bmips: dts: add BCM6362 " Álvaro Fernández Rojas
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes.
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6358-reset.h | 15 +++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6358-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi
index f21176cac038..9d93e7f5e6fc 100644
--- a/arch/mips/boot/dts/brcm/bcm6358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi
@@ -82,6 +82,12 @@ periph_intc: interrupt-controller@fffe000c {
interrupts = <2>, <3>;
};
+ periph_rst: reset-controller@fffe0034 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0xfffe0034 0x4>;
+ #reset-cells = <1>;
+ };
+
leds0: led-controller@fffe00d0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h
new file mode 100644
index 000000000000..bda62ef84f5a
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6358-reset.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6358_H
+#define __DT_BINDINGS_RESET_BCM6358_H
+
+#define BCM6358_RST_SPI 0
+#define BCM6358_RST_ENET 2
+#define BCM6358_RST_MPI 3
+#define BCM6358_RST_EPHY 6
+#define BCM6358_RST_SAR 7
+#define BCM6358_RST_USBH 12
+#define BCM6358_RST_PCM 13
+#define BCM6358_RST_ADSL 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6358_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 6/9] mips: bmips: dts: add BCM6362 reset controller support
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (4 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 5/9] mips: bmips: dts: add BCM6358 " Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 7/9] mips: bmips: dts: add BCM6368 " Álvaro Fernández Rojas
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes.
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6362.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6362-reset.h | 22 ++++++++++++++++++++++
2 files changed, 28 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6362.dtsi b/arch/mips/boot/dts/brcm/bcm6362.dtsi
index 8ae6981735b8..443af6b4c838 100644
--- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h
new file mode 100644
index 000000000000..7ebb0546e0ab
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6362-reset.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6362_H
+#define __DT_BINDINGS_RESET_BCM6362_H
+
+#define BCM6362_RST_SPI 0
+#define BCM6362_RST_IPSEC 1
+#define BCM6362_RST_EPHY 2
+#define BCM6362_RST_SAR 3
+#define BCM6362_RST_ENETSW 4
+#define BCM6362_RST_USBD 5
+#define BCM6362_RST_USBH 6
+#define BCM6362_RST_PCM 7
+#define BCM6362_RST_PCIE_CORE 8
+#define BCM6362_RST_PCIE 9
+#define BCM6362_RST_PCIE_EXT 10
+#define BCM6362_RST_WLAN_SHIM 11
+#define BCM6362_RST_DDR_PHY 12
+#define BCM6362_RST_FAP 13
+#define BCM6362_RST_WLAN_UBUS 14
+
+#endif /* __DT_BINDINGS_RESET_BCM6362_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 7/9] mips: bmips: dts: add BCM6368 reset controller support
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (5 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 6/9] mips: bmips: dts: add BCM6362 " Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 8/9] mips: bmips: dts: add BCM63268 " Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 9/9] mips: bmips: add BCM6318 reset controller definitions Álvaro Fernández Rojas
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes.
v5: no changes.
v4: no changes.
v3: add reset controller definitions header file.
v2: no changes.
arch/mips/boot/dts/brcm/bcm6368.dtsi | 6 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 16 ++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
index 449c167dd892..52c19f40b9cc 100644
--- a/arch/mips/boot/dts/brcm/bcm6368.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h
new file mode 100644
index 000000000000..c81d8eb6d173
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6368-reset.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6368_H
+#define __DT_BINDINGS_RESET_BCM6368_H
+
+#define BCM6368_RST_SPI 0
+#define BCM6368_RST_MPI 3
+#define BCM6368_RST_IPSEC 4
+#define BCM6368_RST_EPHY 6
+#define BCM6368_RST_SAR 7
+#define BCM6368_RST_SWITCH 10
+#define BCM6368_RST_USBD 11
+#define BCM6368_RST_USBH 12
+#define BCM6368_RST_PCM 13
+
+#endif /* __DT_BINDINGS_RESET_BCM6368_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 8/9] mips: bmips: dts: add BCM63268 reset controller support
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (6 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 7/9] mips: bmips: dts: add BCM6368 " Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
2020-06-17 8:32 ` [PATCH v6 9/9] mips: bmips: add BCM6318 reset controller definitions Álvaro Fernández Rojas
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas
BCM63268 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
---
v6: no changes.
v5: no changes.
v4: no changes.
v3: add new path with BCM63268 reset controller support.
arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +++++
include/dt-bindings/reset/bcm63268-reset.h | 26 ++++++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm63268-reset.h
diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index beec24145af7..0150da7e3905 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 {
mask = <0x1>;
};
+ periph_rst: reset-controller@10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x20>,
diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h
new file mode 100644
index 000000000000..6a6403a4c2d5
--- /dev/null
+++ b/include/dt-bindings/reset/bcm63268-reset.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM63268_H
+#define __DT_BINDINGS_RESET_BCM63268_H
+
+#define BCM63268_RST_SPI 0
+#define BCM63268_RST_IPSEC 1
+#define BCM63268_RST_EPHY 2
+#define BCM63268_RST_SAR 3
+#define BCM63268_RST_ENETSW 4
+#define BCM63268_RST_USBS 5
+#define BCM63268_RST_USBH 6
+#define BCM63268_RST_PCM 7
+#define BCM63268_RST_PCIE_CORE 8
+#define BCM63268_RST_PCIE 9
+#define BCM63268_RST_PCIE_EXT 10
+#define BCM63268_RST_WLAN_SHIM 11
+#define BCM63268_RST_DDR_PHY 12
+#define BCM63268_RST_FAP0 13
+#define BCM63268_RST_WLAN_UBUS 14
+#define BCM63268_RST_DECT 15
+#define BCM63268_RST_FAP1 16
+#define BCM63268_RST_PCIE_HARD 17
+#define BCM63268_RST_GPHY 18
+
+#endif /* __DT_BINDINGS_RESET_BCM63268_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v6 9/9] mips: bmips: add BCM6318 reset controller definitions
2020-06-17 8:32 [PATCH v6 0/9] bmips: add bcm6345 reset controller support Álvaro Fernández Rojas
` (7 preceding siblings ...)
2020-06-17 8:32 ` [PATCH v6 8/9] mips: bmips: dts: add BCM63268 " Álvaro Fernández Rojas
@ 2020-06-17 8:32 ` Álvaro Fernández Rojas
8 siblings, 0 replies; 11+ messages in thread
From: Álvaro Fernández Rojas @ 2020-06-17 8:32 UTC (permalink / raw)
To: p.zabel, robh+dt, tsbogend, f.fainelli, jonas.gorski, devicetree,
linux-kernel, linux-mips, bcm-kernel-feedback-list
Cc: Álvaro Fernández Rojas, Florian Fainelli
BCM6318 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <F.fainelli@gmail.com>
---
v6: fix BCM6318_RST_HOSTMIPS value (12 vs 11).
v5: no changes.
v4: no changes.
v3: add new path with BCM6318 reset controller definitions.
include/dt-bindings/reset/bcm6318-reset.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h
new file mode 100644
index 000000000000..f882662505ea
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6318-reset.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6318_H
+#define __DT_BINDINGS_RESET_BCM6318_H
+
+#define BCM6318_RST_SPI 0
+#define BCM6318_RST_EPHY 1
+#define BCM6318_RST_SAR 2
+#define BCM6318_RST_ENETSW 3
+#define BCM6318_RST_USBD 4
+#define BCM6318_RST_USBH 5
+#define BCM6318_RST_PCIE_CORE 6
+#define BCM6318_RST_PCIE 7
+#define BCM6318_RST_PCIE_EXT 8
+#define BCM6318_RST_PCIE_HARD 9
+#define BCM6318_RST_ADSL 10
+#define BCM6318_RST_PHYMIPS 11
+#define BCM6318_RST_HOSTMIPS 12
+
+#endif /* __DT_BINDINGS_RESET_BCM6318_H */
--
2.27.0
^ permalink raw reply related [flat|nested] 11+ messages in thread