* [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names
@ 2020-06-07 13:10 Martin Blumenstingl
2020-06-07 13:40 ` Hauke Mehrtens
2020-06-17 11:14 ` Thomas Bogendoerfer
0 siblings, 2 replies; 3+ messages in thread
From: Martin Blumenstingl @ 2020-06-07 13:10 UTC (permalink / raw)
To: tsbogend, hauke, linux-mips
Cc: john, linux-kernel, Martin Blumenstingl, stable
The dt-bindings for the GSWIP describe that the node should be named
"switch". Use the same name in sysctrl.c so the GSWIP driver can
actually find the "gphy0" and "gphy1" clocks.
Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
Cc: stable@vger.kernel.org
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/mips/lantiq/xway/sysctrl.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index aa37545ebe8f..b10342018d19 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -514,8 +514,8 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
PMU_PPE_DP | PMU_PPE_TC);
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
@@ -538,8 +538,8 @@ void __init ltq_soc_init(void)
PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
PMU_PPE_QSB | PMU_PPE_TOP);
- clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
- clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
+ clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
--
2.27.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names
2020-06-07 13:10 [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names Martin Blumenstingl
@ 2020-06-07 13:40 ` Hauke Mehrtens
2020-06-17 11:14 ` Thomas Bogendoerfer
1 sibling, 0 replies; 3+ messages in thread
From: Hauke Mehrtens @ 2020-06-07 13:40 UTC (permalink / raw)
To: Martin Blumenstingl, tsbogend, linux-mips; +Cc: john, linux-kernel, stable
[-- Attachment #1.1: Type: text/plain, Size: 2108 bytes --]
On 6/7/20 3:10 PM, Martin Blumenstingl wrote:
> The dt-bindings for the GSWIP describe that the node should be named
> "switch". Use the same name in sysctrl.c so the GSWIP driver can
> actually find the "gphy0" and "gphy1" clocks.
>
> Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
> Cc: stable@vger.kernel.org
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
> ---
> arch/mips/lantiq/xway/sysctrl.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
> index aa37545ebe8f..b10342018d19 100644
> --- a/arch/mips/lantiq/xway/sysctrl.c
> +++ b/arch/mips/lantiq/xway/sysctrl.c
> @@ -514,8 +514,8 @@ void __init ltq_soc_init(void)
> clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
> PMU_PPE_DP | PMU_PPE_TC);
> clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
> - clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
> - clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
> + clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
> + clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
> clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
> clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
> clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
> @@ -538,8 +538,8 @@ void __init ltq_soc_init(void)
> PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
> PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
> PMU_PPE_QSB | PMU_PPE_TOP);
> - clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
> - clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
> + clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
> + clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
> clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
> clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
> clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
>
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names
2020-06-07 13:10 [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names Martin Blumenstingl
2020-06-07 13:40 ` Hauke Mehrtens
@ 2020-06-17 11:14 ` Thomas Bogendoerfer
1 sibling, 0 replies; 3+ messages in thread
From: Thomas Bogendoerfer @ 2020-06-17 11:14 UTC (permalink / raw)
To: Martin Blumenstingl; +Cc: hauke, linux-mips, john, linux-kernel, stable
On Sun, Jun 07, 2020 at 03:10:23PM +0200, Martin Blumenstingl wrote:
> The dt-bindings for the GSWIP describe that the node should be named
> "switch". Use the same name in sysctrl.c so the GSWIP driver can
> actually find the "gphy0" and "gphy1" clocks.
>
> Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
> Cc: stable@vger.kernel.org
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> arch/mips/lantiq/xway/sysctrl.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
applied to mips-fixes.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-06-07 13:10 [PATCH] MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names Martin Blumenstingl
2020-06-07 13:40 ` Hauke Mehrtens
2020-06-17 11:14 ` Thomas Bogendoerfer
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