* [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 11:34 ` Manivannan Sadhasivam
2020-06-22 22:27 ` [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC Bjorn Andersson
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels,
rather than as a regulator. As such it's available from the rpmhpd as
the SM8250_LCX power domain.
Fixes: ec13d5c23a33 ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 7 -------
1 file changed, 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 2fc9e7ff0060..63d259931c4d 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -140,13 +140,6 @@ vreg_l10a_1p8: ldo10 {
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
- vreg_l11a_0p75: ldo11 {
- regulator-name = "vreg_l11a_0p75";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
vreg_l12a_1p8: ldo12 {
regulator-name = "vreg_l12a_1p8";
regulator-min-microvolt = <1800000>;
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11
2020-06-22 22:27 ` [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11 Bjorn Andersson
@ 2020-06-23 11:34 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 11:34 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:42PM -0700, Bjorn Andersson wrote:
> PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels,
> rather than as a regulator. As such it's available from the rpmhpd as
> the SM8250_LCX power domain.
>
> Fixes: ec13d5c23a33 ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009")
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> index 2fc9e7ff0060..63d259931c4d 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> @@ -140,13 +140,6 @@ vreg_l10a_1p8: ldo10 {
> regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> };
>
> - vreg_l11a_0p75: ldo11 {
> - regulator-name = "vreg_l11a_0p75";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <800000>;
> - regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> - };
> -
> vreg_l12a_1p8: ldo12 {
> regulator-name = "vreg_l12a_1p8";
> regulator-min-microvolt = <1800000>;
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
2020-06-22 22:27 ` [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11 Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 2:43 ` Manivannan Sadhasivam
2020-06-22 22:27 ` [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node Bjorn Andersson
` (4 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
Add the IPCC node, used to send and receive IPC signals with
remoteprocs.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index e583a01cbcf1..74a7ca96177e 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -329,6 +330,15 @@ gcc: clock-controller@100000 {
clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
};
+ ipcc: interrupt-controller@408000 {
+ compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
+ reg = <0 0x00408000 0 0x1000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #mbox-cells = <2>;
+ };
+
qupv3_id_2: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x008c0000 0x0 0x6000>;
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC
2020-06-22 22:27 ` [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC Bjorn Andersson
@ 2020-06-23 2:43 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 2:43 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:43PM -0700, Bjorn Andersson wrote:
> Add the IPCC node, used to send and receive IPC signals with
> remoteprocs.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index e583a01cbcf1..74a7ca96177e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/mailbox/qcom-ipcc.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> @@ -329,6 +330,15 @@ gcc: clock-controller@100000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>;
> };
>
> + ipcc: interrupt-controller@408000 {
ipcc: mailbox@408000
Other than this,
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> + compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
> + reg = <0 0x00408000 0 0x1000>;
> + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + #mbox-cells = <2>;
> + };
> +
> qupv3_id_2: geniqup@8c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0x0 0x008c0000 0x0 0x6000>;
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
2020-06-22 22:27 ` [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11 Bjorn Andersson
2020-06-22 22:27 ` [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 2:47 ` Manivannan Sadhasivam
2020-06-22 22:27 ` [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes Bjorn Andersson
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
Add a node for the QMP AOSS.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 74a7ca96177e..246e6f279aa8 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/power/qcom-aoss-qmp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -989,6 +990,19 @@ pdc: interrupt-controller@b220000 {
interrupt-controller;
};
+ aoss_qmp: qmp@c300000 {
+ compatible = "qcom,sm8250-aoss-qmp";
+ reg = <0 0x0c300000 0 0x100000>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_AOP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_AOP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ #clock-cells = <0>;
+ #power-domain-cells = <1>;
+ };
+
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0 0x0c440000 0x0 0x0001100>,
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node
2020-06-22 22:27 ` [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node Bjorn Andersson
@ 2020-06-23 2:47 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 2:47 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:44PM -0700, Bjorn Andersson wrote:
> Add a node for the QMP AOSS.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 74a7ca96177e..246e6f279aa8 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -7,6 +7,7 @@
> #include <dt-bindings/clock/qcom,gcc-sm8250.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/mailbox/qcom-ipcc.h>
> +#include <dt-bindings/power/qcom-aoss-qmp.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> @@ -989,6 +990,19 @@ pdc: interrupt-controller@b220000 {
> interrupt-controller;
> };
>
> + aoss_qmp: qmp@c300000 {
> + compatible = "qcom,sm8250-aoss-qmp";
> + reg = <0 0x0c300000 0 0x100000>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_AOP
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_AOP
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + #clock-cells = <0>;
> + #power-domain-cells = <1>;
> + };
> +
> spmi_bus: spmi@c440000 {
> compatible = "qcom,spmi-pmic-arb";
> reg = <0x0 0x0c440000 0x0 0x0001100>,
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
` (2 preceding siblings ...)
2020-06-22 22:27 ` [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 2:48 ` Manivannan Sadhasivam
2020-06-22 22:27 ` [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs Bjorn Andersson
` (2 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
SMP2P is used for interrupting and being interrupted about remoteproc
state changes related to the audio, compute and sensor subsystems.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 246e6f279aa8..364d9a798673 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -314,6 +314,78 @@ smem: qcom,smem {
hwlocks = <&tcsr_mutex 3>;
};
+ smp2p-adsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <443>, <429>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <2>;
+
+ smp2p_adsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_adsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-cdsp {
+ compatible = "qcom,smp2p";
+ qcom,smem = <94>, <432>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <5>;
+
+ smp2p_cdsp_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_cdsp_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ smp2p-slpi {
+ compatible = "qcom,smp2p";
+ qcom,smem = <481>, <430>;
+ interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_SMP2P
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_SMP2P>;
+
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <3>;
+
+ smp2p_slpi_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ smp2p_slpi_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
soc: soc@0 {
#address-cells = <2>;
#size-cells = <2>;
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes
2020-06-22 22:27 ` [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes Bjorn Andersson
@ 2020-06-23 2:48 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 2:48 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:45PM -0700, Bjorn Andersson wrote:
> SMP2P is used for interrupting and being interrupted about remoteproc
> state changes related to the audio, compute and sensor subsystems.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++++++++++++++++
> 1 file changed, 72 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 246e6f279aa8..364d9a798673 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -314,6 +314,78 @@ smem: qcom,smem {
> hwlocks = <&tcsr_mutex 3>;
> };
>
> + smp2p-adsp {
> + compatible = "qcom,smp2p";
> + qcom,smem = <443>, <429>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <2>;
> +
> + smp2p_adsp_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_adsp_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-cdsp {
> + compatible = "qcom,smp2p";
> + qcom,smem = <94>, <432>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <5>;
> +
> + smp2p_cdsp_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_cdsp_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + smp2p-slpi {
> + compatible = "qcom,smp2p";
> + qcom,smem = <481>, <430>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <3>;
> +
> + smp2p_slpi_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_slpi_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
` (3 preceding siblings ...)
2020-06-22 22:27 ` [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 2:54 ` Manivannan Sadhasivam
2020-06-22 22:27 ` [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver Bjorn Andersson
2020-06-23 8:09 ` [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Vinod Koul
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
Add remoteproc nodes for the audio, compute and sensor cores, define
glink for each one and enable them on the MTP with appropriate firmware
defined.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 15 +++
arch/arm64/boot/dts/qcom/sm8250.dtsi | 116 ++++++++++++++++++++++++
2 files changed, 131 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 63d259931c4d..6894f8490dae 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -55,6 +55,11 @@ vreg_s6c_0p88: smpc6-regulator {
};
};
+&adsp {
+ status = "okay";
+ firmware-name = "qcom/sm8250/adsp.mbn";
+};
+
&apps_rsc {
pm8150-rpmh-regulators {
compatible = "qcom,pm8150-rpmh-regulators";
@@ -348,10 +353,20 @@ vreg_l7f_1p8: ldo7 {
};
};
+&cdsp {
+ status = "okay";
+ firmware-name = "qcom/sm8250/cdsp.mbn";
+};
+
&qupv3_id_1 {
status = "okay";
};
+&slpi {
+ status = "okay";
+ firmware-name = "qcom/sm8250/slpi.mbn";
+};
+
&tlmm {
gpio-reserved-ranges = <28 4>, <40 4>;
};
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 364d9a798673..a21299b9c62f 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -1052,6 +1052,83 @@ tcsr_mutex_regs: syscon@1f40000 {
reg = <0x0 0x01f40000 0x0 0x40000>;
};
+ slpi: remoteproc@5c00000 {
+ compatible = "qcom,sm8250-slpi-pas";
+ reg = <0 0x05c00000 0 0x4000>;
+
+ interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>,
+ <&rpmhpd SM8250_LCX>,
+ <&rpmhpd SM8250_LMX>;
+ power-domain-names = "load_state", "lcx", "lmx";
+
+ memory-region = <&slpi_mem>;
+
+ qcom,smem-states = <&smp2p_slpi_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_SLPI
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <3>;
+ };
+ };
+
+ cdsp: remoteproc@8300000 {
+ compatible = "qcom,sm8250-cdsp-pas";
+ reg = <0 0x08300000 0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>,
+ <&rpmhpd SM8250_CX>;
+ power-domain-names = "load_state", "cx";
+
+ memory-region = <&cdsp_mem>;
+
+ qcom,smem-states = <&smp2p_cdsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_CDSP
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <5>;
+ };
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8250-pdc", "qcom,pdc";
reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
@@ -1668,6 +1745,45 @@ config {
};
};
+ adsp: remoteproc@17300000 {
+ compatible = "qcom,sm8250-adsp-pas";
+ reg = <0 0x17300000 0 0x100>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>,
+ <&rpmhpd SM8250_LCX>,
+ <&rpmhpd SM8250_LMX>;
+ power-domain-names = "load_state", "lcx", "lmx";
+
+ memory-region = <&adsp_mem>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ };
+ };
+
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs
2020-06-22 22:27 ` [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs Bjorn Andersson
@ 2020-06-23 2:54 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 2:54 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:46PM -0700, Bjorn Andersson wrote:
> Add remoteproc nodes for the audio, compute and sensor cores, define
> glink for each one and enable them on the MTP with appropriate firmware
> defined.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 15 +++
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 116 ++++++++++++++++++++++++
> 2 files changed, 131 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> index 63d259931c4d..6894f8490dae 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
> @@ -55,6 +55,11 @@ vreg_s6c_0p88: smpc6-regulator {
> };
> };
>
> +&adsp {
> + status = "okay";
> + firmware-name = "qcom/sm8250/adsp.mbn";
> +};
> +
> &apps_rsc {
> pm8150-rpmh-regulators {
> compatible = "qcom,pm8150-rpmh-regulators";
> @@ -348,10 +353,20 @@ vreg_l7f_1p8: ldo7 {
> };
> };
>
> +&cdsp {
> + status = "okay";
> + firmware-name = "qcom/sm8250/cdsp.mbn";
> +};
> +
> &qupv3_id_1 {
> status = "okay";
> };
>
> +&slpi {
> + status = "okay";
> + firmware-name = "qcom/sm8250/slpi.mbn";
> +};
> +
> &tlmm {
> gpio-reserved-ranges = <28 4>, <40 4>;
> };
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 364d9a798673..a21299b9c62f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -1052,6 +1052,83 @@ tcsr_mutex_regs: syscon@1f40000 {
> reg = <0x0 0x01f40000 0x0 0x40000>;
> };
>
> + slpi: remoteproc@5c00000 {
> + compatible = "qcom,sm8250-slpi-pas";
> + reg = <0 0x05c00000 0 0x4000>;
> +
> + interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,
> + <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>,
> + <&rpmhpd SM8250_LCX>,
> + <&rpmhpd SM8250_LMX>;
> + power-domain-names = "load_state", "lcx", "lmx";
> +
> + memory-region = <&slpi_mem>;
> +
> + qcom,smem-states = <&smp2p_slpi_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "lpass";
> + qcom,remote-pid = <3>;
> + };
> + };
> +
> + cdsp: remoteproc@8300000 {
> + compatible = "qcom,sm8250-cdsp-pas";
> + reg = <0 0x08300000 0 0x10000>;
> +
> + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
> + <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>,
> + <&rpmhpd SM8250_CX>;
> + power-domain-names = "load_state", "cx";
> +
> + memory-region = <&cdsp_mem>;
> +
> + qcom,smem-states = <&smp2p_cdsp_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_CDSP
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "lpass";
> + qcom,remote-pid = <5>;
> + };
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sm8250-pdc", "qcom,pdc";
> reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>;
> @@ -1668,6 +1745,45 @@ config {
> };
> };
>
> + adsp: remoteproc@17300000 {
> + compatible = "qcom,sm8250-adsp-pas";
> + reg = <0 0x17300000 0 0x100>;
> +
> + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
> + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal", "ready",
> + "handover", "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>,
> + <&rpmhpd SM8250_LCX>,
> + <&rpmhpd SM8250_LMX>;
> + power-domain-names = "load_state", "lcx", "lmx";
> +
> + memory-region = <&adsp_mem>;
> +
> + qcom,smem-states = <&smp2p_adsp_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_LPASS
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "lpass";
> + qcom,remote-pid = <2>;
> + };
> + };
> +
> intc: interrupt-controller@17a00000 {
> compatible = "arm,gic-v3";
> #interrupt-cells = <3>;
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
` (4 preceding siblings ...)
2020-06-22 22:27 ` [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs Bjorn Andersson
@ 2020-06-22 22:27 ` Bjorn Andersson
2020-06-23 2:56 ` Manivannan Sadhasivam
2020-06-23 8:09 ` [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Vinod Koul
6 siblings, 1 reply; 14+ messages in thread
From: Bjorn Andersson @ 2020-06-22 22:27 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Manivannan Sadhasivam
Cc: linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
The IPCC hardware block provides a mechanism for triggering interrupts
between co-processors in recent Qualcomm SoCs. This is used as basis for
most form of communication between co-processors, so enable this
support.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 5848799dcad0..b3d13e1a052a 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y
CONFIG_PLATFORM_MHU=y
CONFIG_BCM2835_MBOX=y
CONFIG_QCOM_APCS_IPC=y
+CONFIG_QCOM_IPCC=y
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_ARM_SMMU=y
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver
2020-06-22 22:27 ` [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver Bjorn Andersson
@ 2020-06-23 2:56 ` Manivannan Sadhasivam
0 siblings, 0 replies; 14+ messages in thread
From: Manivannan Sadhasivam @ 2020-06-23 2:56 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, linux-arm-msm, devicetree,
linux-kernel, linux-arm-kernel
On Mon, Jun 22, 2020 at 03:27:47PM -0700, Bjorn Andersson wrote:
> The IPCC hardware block provides a mechanism for triggering interrupts
> between co-processors in recent Qualcomm SoCs. This is used as basis for
> most form of communication between co-processors, so enable this
> support.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 5848799dcad0..b3d13e1a052a 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y
> CONFIG_PLATFORM_MHU=y
> CONFIG_BCM2835_MBOX=y
> CONFIG_QCOM_APCS_IPC=y
> +CONFIG_QCOM_IPCC=y
> CONFIG_ROCKCHIP_IOMMU=y
> CONFIG_TEGRA_IOMMU_SMMU=y
> CONFIG_ARM_SMMU=y
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs
2020-06-22 22:27 [PATCH 0/6] arm64: dts: qcom: Enable SM8250 remoteprocs Bjorn Andersson
` (5 preceding siblings ...)
2020-06-22 22:27 ` [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver Bjorn Andersson
@ 2020-06-23 8:09 ` Vinod Koul
6 siblings, 0 replies; 14+ messages in thread
From: Vinod Koul @ 2020-06-23 8:09 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Dmitry Baryshkov, Manivannan Sadhasivam,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
On 22-06-20, 15:27, Bjorn Andersson wrote:
> With the driver code in place, add the necessary dts nodes to enable three of
> the remoteprocs found on Qualcomm SM8250 and finally enable the missing
> QCOM_IPCC driver in defconfig.
All look great to me:
Reviewed-by: Vinod Koul <vkoul@kernel.org>
--
~Vinod
^ permalink raw reply [flat|nested] 14+ messages in thread