From: Prashant Malani <pmalani@chromium.org>
To: linux-kernel@vger.kernel.org
Cc: heikki.krogerus@linux.intel.com,
Prashant Malani <pmalani@chromium.org>,
Benson Leung <bleung@chromium.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
Guenter Roeck <groeck@chromium.org>,
Gwendal Grignou <gwendal@chromium.org>,
Mark Brown <broonie@kernel.org>,
Tzung-Bi Shih <tzungbi@google.com>,
Yicheng Li <yichengli@chromium.org>
Subject: [PATCH 1/2] platform/chrome: cros_ec_typec: Add TBT pd_ctrl fields
Date: Wed, 24 Jun 2020 01:09:23 -0700 [thread overview]
Message-ID: <20200624080926.165107-1-pmalani@chromium.org> (raw)
To support Thunderbolt compatibility mode, synchronize
ec_response_usb_pd_control_v2 with the Chrome EC version, so that
we get the Thunderbolt related control fields and macros.
Signed-off-by: Prashant Malani <pmalani@chromium.org>
---
.../linux/platform_data/cros_ec_commands.h | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index a7b0fc440c35..b808570bdd04 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -4917,15 +4917,26 @@ struct ec_response_usb_pd_control_v1 {
#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */
#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */
+/* Active/Passive Cable */
+#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
+/* Optical/Non-optical cable */
+#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
+/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
+#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
+/* Active Link Uni-Direction */
+#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
+
struct ec_response_usb_pd_control_v2 {
uint8_t enabled;
uint8_t role;
uint8_t polarity;
char state[32];
- uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */
- uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
- /* CL:1500994 Current cable type */
- uint8_t reserved_cable_type;
+ uint8_t cc_state; /* enum pd_cc_states representing cc state */
+ uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
+ uint8_t reserved; /* Reserved for future use */
+ uint8_t control_flags; /* USB_PD_CTRL_*flags */
+ uint8_t cable_speed; /* TBT_SS_* cable speed */
+ uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */
} __ec_align1;
#define EC_CMD_USB_PD_PORTS 0x0102
--
2.27.0.111.gc72c7da667-goog
next reply other threads:[~2020-06-24 8:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-24 8:09 Prashant Malani [this message]
2020-06-24 8:09 ` [PATCH 2/2] platform/chrome: cros_ec_typec: Add TBT compat support Prashant Malani
2020-06-24 9:15 ` Heikki Krogerus
2020-06-24 9:20 ` Heikki Krogerus
2020-06-24 17:42 ` Prashant Malani
2020-06-25 7:45 ` Heikki Krogerus
2020-06-26 9:10 ` [PATCH 1/2] platform/chrome: cros_ec_typec: Add TBT pd_ctrl fields Enric Balletbo i Serra
2020-06-26 19:04 ` Prashant Malani
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