* [PATCH v2 1/3] net: dsa: mv88e6xxx: MV88E6097 does not support jumbo configuration
2020-07-23 23:21 [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Chris Packham
@ 2020-07-23 23:21 ` Chris Packham
2020-07-23 23:21 ` [PATCH v2 2/3] net: dsa: mv88e6xxx: Support jumbo configuration on 6190/6190X Chris Packham
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Chris Packham @ 2020-07-23 23:21 UTC (permalink / raw)
To: andrew, vivien.didelot, f.fainelli, davem, kuba
Cc: netdev, linux-kernel, Chris Packham
The MV88E6097 chip does not support configuring jumbo frames. Prior to
commit 5f4366660d65 only the 6352, 6351, 6165 and 6320 chips configured
jumbo mode. The refactor accidentally added the function for the 6097.
Remove the erroneous function pointer assignment.
Fixes: 5f4366660d65 ("net: dsa: mv88e6xxx: Refactor setting of jumbo frames")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
Changes in v2:
- Add review from Andrew
drivers/net/dsa/mv88e6xxx/chip.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 6f019955ae42..4ddb6f3035c9 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3494,7 +3494,6 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
.port_set_ether_type = mv88e6351_port_set_ether_type,
- .port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
.port_pause_limit = mv88e6097_port_pause_limit,
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
--
2.27.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/3] net: dsa: mv88e6xxx: Support jumbo configuration on 6190/6190X
2020-07-23 23:21 [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Chris Packham
2020-07-23 23:21 ` [PATCH v2 1/3] net: dsa: mv88e6xxx: MV88E6097 does not support jumbo configuration Chris Packham
@ 2020-07-23 23:21 ` Chris Packham
2020-07-23 23:21 ` [PATCH v2 3/3] net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU Chris Packham
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Chris Packham @ 2020-07-23 23:21 UTC (permalink / raw)
To: andrew, vivien.didelot, f.fainelli, davem, kuba
Cc: netdev, linux-kernel, Chris Packham
The MV88E6190 and MV88E6190X both support per port jumbo configuration
just like the other GE switches. Install the appropriate ops.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
I'm including this change in my series for completeness. Looking at the
datasheets I think this is an unintentional omission but I don't have actual
hardware to test this change on so some testing from someone with access to the
right chip would be appreciated.
Changes in v2:
- Add review from Andrew
drivers/net/dsa/mv88e6xxx/chip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 4ddb6f3035c9..43a2ab8cf2c8 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3958,6 +3958,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
.port_set_ether_type = mv88e6351_port_set_ether_type,
+ .port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
.port_pause_limit = mv88e6390_port_pause_limit,
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
@@ -4016,6 +4017,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
.port_set_ether_type = mv88e6351_port_set_ether_type,
+ .port_set_jumbo_size = mv88e6165_port_set_jumbo_size,
.port_pause_limit = mv88e6390_port_pause_limit,
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
--
2.27.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 3/3] net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU
2020-07-23 23:21 [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Chris Packham
2020-07-23 23:21 ` [PATCH v2 1/3] net: dsa: mv88e6xxx: MV88E6097 does not support jumbo configuration Chris Packham
2020-07-23 23:21 ` [PATCH v2 2/3] net: dsa: mv88e6xxx: Support jumbo configuration on 6190/6190X Chris Packham
@ 2020-07-23 23:21 ` Chris Packham
2020-07-24 14:50 ` Andrew Lunn
2020-07-24 14:52 ` [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Andrew Lunn
2020-07-25 3:03 ` David Miller
4 siblings, 1 reply; 7+ messages in thread
From: Chris Packham @ 2020-07-23 23:21 UTC (permalink / raw)
To: andrew, vivien.didelot, f.fainelli, davem, kuba
Cc: netdev, linux-kernel, Chris Packham
Some of the chips in the mv88e6xxx family don't support jumbo
configuration per port. But they do have a chip-wide max frame size that
can be used. Use this to approximate the behaviour of configuring a port
based MTU.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
The only hardware I have access to uses a 88E6097. I've included the 6085, 6123
and 6185 based on reading the datasheets.
Changes in v2:
- Rebase on top of net-next/master
drivers/net/dsa/mv88e6xxx/chip.c | 9 +++++++++
drivers/net/dsa/mv88e6xxx/chip.h | 3 +++
drivers/net/dsa/mv88e6xxx/global1.c | 17 +++++++++++++++++
drivers/net/dsa/mv88e6xxx/global1.h | 2 ++
4 files changed, 31 insertions(+)
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 43a2ab8cf2c8..b8a3e8c88c07 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -2699,6 +2699,8 @@ static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port)
if (chip->info->ops->port_set_jumbo_size)
return 10240;
+ else if (chip->info->ops->set_max_frame_size)
+ return 1632;
return 1522;
}
@@ -2710,6 +2712,8 @@ static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
mv88e6xxx_reg_lock(chip);
if (chip->info->ops->port_set_jumbo_size)
ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu);
+ else if (chip->info->ops->set_max_frame_size)
+ ret = chip->info->ops->set_max_frame_size(chip, new_mtu);
else
if (new_mtu > 1522)
ret = -EINVAL;
@@ -3450,6 +3454,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
.vtu_getnext = mv88e6352_g1_vtu_getnext,
.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
.phylink_validate = mv88e6185_phylink_validate,
+ .set_max_frame_size = mv88e6185_g1_set_max_frame_size,
};
static const struct mv88e6xxx_ops mv88e6095_ops = {
@@ -3478,6 +3483,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
.vtu_getnext = mv88e6185_g1_vtu_getnext,
.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
.phylink_validate = mv88e6185_phylink_validate,
+ .set_max_frame_size = mv88e6185_g1_set_max_frame_size,
};
static const struct mv88e6xxx_ops mv88e6097_ops = {
@@ -3515,6 +3521,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
.vtu_getnext = mv88e6352_g1_vtu_getnext,
.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
.phylink_validate = mv88e6185_phylink_validate,
+ .set_max_frame_size = mv88e6185_g1_set_max_frame_size,
};
static const struct mv88e6xxx_ops mv88e6123_ops = {
@@ -3549,6 +3556,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
.vtu_getnext = mv88e6352_g1_vtu_getnext,
.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
.phylink_validate = mv88e6185_phylink_validate,
+ .set_max_frame_size = mv88e6185_g1_set_max_frame_size,
};
static const struct mv88e6xxx_ops mv88e6131_ops = {
@@ -3938,6 +3946,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
.vtu_getnext = mv88e6185_g1_vtu_getnext,
.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,
.phylink_validate = mv88e6185_phylink_validate,
+ .set_max_frame_size = mv88e6185_g1_set_max_frame_size,
};
static const struct mv88e6xxx_ops mv88e6190_ops = {
diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
index 1c541b074256..2d70eac30e58 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -552,6 +552,9 @@ struct mv88e6xxx_ops {
void (*phylink_validate)(struct mv88e6xxx_chip *chip, int port,
unsigned long *mask,
struct phylink_link_state *state);
+
+ /* Max Frame Size */
+ int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);
};
struct mv88e6xxx_irq_ops {
diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c
index ca3a7a7a73c3..f62aa83ca08d 100644
--- a/drivers/net/dsa/mv88e6xxx/global1.c
+++ b/drivers/net/dsa/mv88e6xxx/global1.c
@@ -196,6 +196,23 @@ int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip)
return mv88e6185_g1_wait_ppu_disabled(chip);
}
+int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu)
+{
+ u16 val;
+ int err;
+
+ err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &val);
+ if (err)
+ return err;
+
+ val &= ~MV88E6185_G1_CTL1_MAX_FRAME_1632;
+
+ if (mtu > 1518)
+ val |= MV88E6185_G1_CTL1_MAX_FRAME_1632;
+
+ return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);
+}
+
/* Offset 0x10: IP-PRI Mapping Register 0
* Offset 0x11: IP-PRI Mapping Register 1
* Offset 0x12: IP-PRI Mapping Register 2
diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
index 5324c6f4ae90..1e3546f8b072 100644
--- a/drivers/net/dsa/mv88e6xxx/global1.h
+++ b/drivers/net/dsa/mv88e6xxx/global1.h
@@ -282,6 +282,8 @@ int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip);
int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);
int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
+int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu);
+
int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
--
2.27.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support
2020-07-23 23:21 [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Chris Packham
` (2 preceding siblings ...)
2020-07-23 23:21 ` [PATCH v2 3/3] net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU Chris Packham
@ 2020-07-24 14:52 ` Andrew Lunn
2020-07-25 3:03 ` David Miller
4 siblings, 0 replies; 7+ messages in thread
From: Andrew Lunn @ 2020-07-24 14:52 UTC (permalink / raw)
To: Chris Packham
Cc: vivien.didelot, f.fainelli, davem, kuba, netdev, linux-kernel
On Fri, Jul 24, 2020 at 11:21:19AM +1200, Chris Packham wrote:
> This series connects up the mv88e6xxx switches to the dsa infrastructure for
> configuring the port MTU. The first patch is also a bug fix which might be a
> candiatate for stable.
>
> I've rebased this series on top of net-next/master to pick up Andrew's change
> for the gigabit switches.
Hi Chris
Please put in the subject line "PATCH net-next v2", so it is clear
which tree this is for.
https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html#q-how-do-i-indicate-which-tree-net-vs-net-next-my-patch-should-be-in
Thanks
Andrew
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support
2020-07-23 23:21 [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Chris Packham
` (3 preceding siblings ...)
2020-07-24 14:52 ` [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support Andrew Lunn
@ 2020-07-25 3:03 ` David Miller
4 siblings, 0 replies; 7+ messages in thread
From: David Miller @ 2020-07-25 3:03 UTC (permalink / raw)
To: chris.packham
Cc: andrew, vivien.didelot, f.fainelli, kuba, netdev, linux-kernel
From: Chris Packham <chris.packham@alliedtelesis.co.nz>
Date: Fri, 24 Jul 2020 11:21:19 +1200
> This series connects up the mv88e6xxx switches to the dsa infrastructure for
> configuring the port MTU. The first patch is also a bug fix which might be a
> candiatate for stable.
>
> I've rebased this series on top of net-next/master to pick up Andrew's change
> for the gigabit switches. Patch 1 and 2 are unchanged (aside from adding
> Andrew's Reviewed-by). Patch 3 is reworked to make use of the existing mtu
> support.
Series applied, thanks Chris.
^ permalink raw reply [flat|nested] 7+ messages in thread