[PATCH v2 0/2] perf tools: Fix record failure when mixed with ARM SPE event

[PATCH v2 0/2] perf tools: Fix record failure when mixed with ARM SPE event

[Wei Li]

v1 -> v2:
 - Optimize code in patch 1 as Mathieu adviced.
 - Fix memleak in patch 2.
 - Detail the commit info to explain the reason.

This patch set fixes perf record failure when we mix arm_spe_x event
with other events in specific order.

Wei Li (2):
  perf tools: Fix record failure when mixed with ARM SPE event
  perf tools: ARM SPE code cleanup

 tools/perf/arch/arm/util/auxtrace.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

-- 
2.17.1

[PATCH v2 1/2] perf tools: Fix record failure when mixed with ARM SPE event

[Wei Li]

When recording with cache-misses and arm_spe_x event, i found that
it will just fail without showing any error info if i put cache-misses
after 'arm_spe_x' event.

[root@localhost 0620]# perf record -e cache-misses -e \
arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\
jitter=1,store_filter=1,min_latency=0/ sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.067 MB perf.data ]
[root@localhost 0620]# perf record -e \
arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\
store_filter=1,min_latency=0/ -e cache-misses sleep 1
[root@localhost 0620]#

The current code can only work if the only event to be traced is an
'arm_spe_x', or if it is the last event to be specified. Otherwise the
last event type will be checked against all the arm_spe_pmus[i]->types,
none will match and an out of bound 'i' index will be used in
arm_spe_recording_init().

We don't support concurrent multiple arm_spe_x events currently, that
is checked in arm_spe_recording_options(), and it will show the relevant
info. So add the check and record of the first found 'arm_spe_pmu' to
fix this issue here.

Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support")
Signed-off-by: Wei Li <liwei391@huawei.com>
---
 tools/perf/arch/arm/util/auxtrace.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
index 0a6e75b8777a..28a5d0c18b1d 100644
--- a/tools/perf/arch/arm/util/auxtrace.c
+++ b/tools/perf/arch/arm/util/auxtrace.c
@@ -56,7 +56,7 @@ struct auxtrace_record
 	struct perf_pmu	*cs_etm_pmu;
 	struct evsel *evsel;
 	bool found_etm = false;
-	bool found_spe = false;
+	struct perf_pmu *found_spe = NULL;
 	static struct perf_pmu **arm_spe_pmus = NULL;
 	static int nr_spes = 0;
 	int i = 0;
@@ -74,12 +74,12 @@ struct auxtrace_record
 		    evsel->core.attr.type == cs_etm_pmu->type)
 			found_etm = true;
 
-		if (!nr_spes)
+		if (!nr_spes || found_spe)
 			continue;
 
 		for (i = 0; i < nr_spes; i++) {
 			if (evsel->core.attr.type == arm_spe_pmus[i]->type) {
-				found_spe = true;
+				found_spe = arm_spe_pmus[i];
 				break;
 			}
 		}
@@ -96,7 +96,7 @@ struct auxtrace_record
 
 #if defined(__aarch64__)
 	if (found_spe)
-		return arm_spe_recording_init(err, arm_spe_pmus[i]);
+		return arm_spe_recording_init(err, found_spe);
 #endif
 
 	/*
-- 
2.17.1

Re: [PATCH v2 1/2] perf tools: Fix record failure when mixed with ARM SPE event

[Leo Yan]

On Fri, Jul 24, 2020 at 03:11:10PM +0800, Wei Li wrote:
> When recording with cache-misses and arm_spe_x event, i found that
> it will just fail without showing any error info if i put cache-misses
> after 'arm_spe_x' event.
> 
> [root@localhost 0620]# perf record -e cache-misses -e \
> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\
> jitter=1,store_filter=1,min_latency=0/ sleep 1
> [ perf record: Woken up 1 times to write data ]
> [ perf record: Captured and wrote 0.067 MB perf.data ]
> [root@localhost 0620]# perf record -e \
> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\
> store_filter=1,min_latency=0/ -e cache-misses sleep 1
> [root@localhost 0620]#
> 
> The current code can only work if the only event to be traced is an
> 'arm_spe_x', or if it is the last event to be specified. Otherwise the
> last event type will be checked against all the arm_spe_pmus[i]->types,
> none will match and an out of bound 'i' index will be used in
> arm_spe_recording_init().
> 
> We don't support concurrent multiple arm_spe_x events currently, that
> is checked in arm_spe_recording_options(), and it will show the relevant
> info. So add the check and record of the first found 'arm_spe_pmu' to
> fix this issue here.
> 
> Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support")
> Signed-off-by: Wei Li <liwei391@huawei.com>

Thanks for the patch, Wei.  I have tested this series on Arm64 D06
platform:

Tested-by: Leo Yan <leo.yan@linaro.org>

I'd like to wait for Mathieu's ACK.

Thanks,
Leo

> ---
>  tools/perf/arch/arm/util/auxtrace.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> index 0a6e75b8777a..28a5d0c18b1d 100644
> --- a/tools/perf/arch/arm/util/auxtrace.c
> +++ b/tools/perf/arch/arm/util/auxtrace.c
> @@ -56,7 +56,7 @@ struct auxtrace_record
>  	struct perf_pmu	*cs_etm_pmu;
>  	struct evsel *evsel;
>  	bool found_etm = false;
> -	bool found_spe = false;
> +	struct perf_pmu *found_spe = NULL;
>  	static struct perf_pmu **arm_spe_pmus = NULL;
>  	static int nr_spes = 0;
>  	int i = 0;
> @@ -74,12 +74,12 @@ struct auxtrace_record
>  		    evsel->core.attr.type == cs_etm_pmu->type)
>  			found_etm = true;
>  
> -		if (!nr_spes)
> +		if (!nr_spes || found_spe)
>  			continue;
>  
>  		for (i = 0; i < nr_spes; i++) {
>  			if (evsel->core.attr.type == arm_spe_pmus[i]->type) {
> -				found_spe = true;
> +				found_spe = arm_spe_pmus[i];
>  				break;
>  			}
>  		}
> @@ -96,7 +96,7 @@ struct auxtrace_record
>  
>  #if defined(__aarch64__)
>  	if (found_spe)
> -		return arm_spe_recording_init(err, arm_spe_pmus[i]);
> +		return arm_spe_recording_init(err, found_spe);
>  #endif
>  
>  	/*
> -- 
> 2.17.1
> 

Re: [PATCH v2 1/2] perf tools: Fix record failure when mixed with ARM SPE event

[Mathieu Poirier]

On Fri, Jul 24, 2020 at 03:11:10PM +0800, Wei Li wrote:
> When recording with cache-misses and arm_spe_x event, i found that
> it will just fail without showing any error info if i put cache-misses
> after 'arm_spe_x' event.
> 
> [root@localhost 0620]# perf record -e cache-misses -e \
> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\
> jitter=1,store_filter=1,min_latency=0/ sleep 1
> [ perf record: Woken up 1 times to write data ]
> [ perf record: Captured and wrote 0.067 MB perf.data ]
> [root@localhost 0620]# perf record -e \
> arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\
> store_filter=1,min_latency=0/ -e cache-misses sleep 1
> [root@localhost 0620]#
> 
> The current code can only work if the only event to be traced is an
> 'arm_spe_x', or if it is the last event to be specified. Otherwise the
> last event type will be checked against all the arm_spe_pmus[i]->types,
> none will match and an out of bound 'i' index will be used in
> arm_spe_recording_init().
> 
> We don't support concurrent multiple arm_spe_x events currently, that
> is checked in arm_spe_recording_options(), and it will show the relevant
> info. So add the check and record of the first found 'arm_spe_pmu' to
> fix this issue here.
> 
> Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support")

Usually SHA1 are 12 character long rather than 13.  Depending on what Arnaldo
wants to do you may have to resend.

> Signed-off-by: Wei Li <liwei391@huawei.com>

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> ---
>  tools/perf/arch/arm/util/auxtrace.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> index 0a6e75b8777a..28a5d0c18b1d 100644
> --- a/tools/perf/arch/arm/util/auxtrace.c
> +++ b/tools/perf/arch/arm/util/auxtrace.c
> @@ -56,7 +56,7 @@ struct auxtrace_record
>  	struct perf_pmu	*cs_etm_pmu;
>  	struct evsel *evsel;
>  	bool found_etm = false;
> -	bool found_spe = false;
> +	struct perf_pmu *found_spe = NULL;
>  	static struct perf_pmu **arm_spe_pmus = NULL;
>  	static int nr_spes = 0;
>  	int i = 0;
> @@ -74,12 +74,12 @@ struct auxtrace_record
>  		    evsel->core.attr.type == cs_etm_pmu->type)
>  			found_etm = true;
>  
> -		if (!nr_spes)
> +		if (!nr_spes || found_spe)
>  			continue;
>  
>  		for (i = 0; i < nr_spes; i++) {
>  			if (evsel->core.attr.type == arm_spe_pmus[i]->type) {
> -				found_spe = true;
> +				found_spe = arm_spe_pmus[i];
>  				break;
>  			}
>  		}
> @@ -96,7 +96,7 @@ struct auxtrace_record
>  
>  #if defined(__aarch64__)
>  	if (found_spe)
> -		return arm_spe_recording_init(err, arm_spe_pmus[i]);
> +		return arm_spe_recording_init(err, found_spe);
>  #endif
>  
>  	/*
> -- 
> 2.17.1
> 

[PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Wei Li]

- Firstly, the function auxtrace_record__init() will be invoked only
  once, the variable "arm_spe_pmus" will not be used afterwards, thus
  we don't need to check "arm_spe_pmus" is NULL or not;
- Another reason is, even though SPE is micro-architecture dependent,
  but so far it only supports "statistical-profiling-extension-v1" and
  we have no chance to use multiple SPE's PMU events in Perf command.

So remove the useless check code to make it clear.

Signed-off-by: Wei Li <liwei391@huawei.com>
---
 tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
index 28a5d0c18b1d..b187bddbd01a 100644
--- a/tools/perf/arch/arm/util/auxtrace.c
+++ b/tools/perf/arch/arm/util/auxtrace.c
@@ -57,17 +57,15 @@ struct auxtrace_record
 	struct evsel *evsel;
 	bool found_etm = false;
 	struct perf_pmu *found_spe = NULL;
-	static struct perf_pmu **arm_spe_pmus = NULL;
-	static int nr_spes = 0;
+	struct perf_pmu **arm_spe_pmus = NULL;
+	int nr_spes = 0;
 	int i = 0;
 
 	if (!evlist)
 		return NULL;
 
 	cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
-
-	if (!arm_spe_pmus)
-		arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
+	arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
 
 	evlist__for_each_entry(evlist, evsel) {
 		if (cs_etm_pmu &&
@@ -84,6 +82,7 @@ struct auxtrace_record
 			}
 		}
 	}
+	free(arm_spe_pmus);
 
 	if (found_etm && found_spe) {
 		pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
-- 
2.17.1

Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Mathieu Poirier]

On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> - Firstly, the function auxtrace_record__init() will be invoked only
>   once, the variable "arm_spe_pmus" will not be used afterwards, thus
>   we don't need to check "arm_spe_pmus" is NULL or not;
> - Another reason is, even though SPE is micro-architecture dependent,
>   but so far it only supports "statistical-profiling-extension-v1" and
>   we have no chance to use multiple SPE's PMU events in Perf command.

I find the above changelog somewhat out of touch with the patch itself.  The
only thing that is happening here is the removal of a useless check and a fix
for a memory leak.

Once again whether Arnaldo wants to make the changes by hand or not you may have
to resubmit.

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> 
> So remove the useless check code to make it clear.
> 
> Signed-off-by: Wei Li <liwei391@huawei.com>
> ---
>  tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> index 28a5d0c18b1d..b187bddbd01a 100644
> --- a/tools/perf/arch/arm/util/auxtrace.c
> +++ b/tools/perf/arch/arm/util/auxtrace.c
> @@ -57,17 +57,15 @@ struct auxtrace_record
>  	struct evsel *evsel;
>  	bool found_etm = false;
>  	struct perf_pmu *found_spe = NULL;
> -	static struct perf_pmu **arm_spe_pmus = NULL;
> -	static int nr_spes = 0;
> +	struct perf_pmu **arm_spe_pmus = NULL;
> +	int nr_spes = 0;
>  	int i = 0;
>  
>  	if (!evlist)
>  		return NULL;
>  
>  	cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> -
> -	if (!arm_spe_pmus)
> -		arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> +	arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
>  
>  	evlist__for_each_entry(evlist, evsel) {
>  		if (cs_etm_pmu &&
> @@ -84,6 +82,7 @@ struct auxtrace_record
>  			}
>  		}
>  	}
> +	free(arm_spe_pmus);
>  
>  	if (found_etm && found_spe) {
>  		pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> -- 
> 2.17.1
> 

Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Arnaldo Carvalho de Melo]

Em Mon, Jul 27, 2020 at 02:34:36PM -0600, Mathieu Poirier escreveu:
> On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> > - Firstly, the function auxtrace_record__init() will be invoked only
> >   once, the variable "arm_spe_pmus" will not be used afterwards, thus
> >   we don't need to check "arm_spe_pmus" is NULL or not;
> > - Another reason is, even though SPE is micro-architecture dependent,
> >   but so far it only supports "statistical-profiling-extension-v1" and
> >   we have no chance to use multiple SPE's PMU events in Perf command.
> 
> I find the above changelog somewhat out of touch with the patch itself.  The
> only thing that is happening here is the removal of a useless check and a fix
> for a memory leak.
> 
> Once again whether Arnaldo wants to make the changes by hand or not you may have
> to resubmit.

I'll fix it now, thanks for reviewing.

- Arnaldo
 
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> 
> > 
> > So remove the useless check code to make it clear.
> > 
> > Signed-off-by: Wei Li <liwei391@huawei.com>
> > ---
> >  tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
> >  1 file changed, 4 insertions(+), 5 deletions(-)
> > 
> > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> > index 28a5d0c18b1d..b187bddbd01a 100644
> > --- a/tools/perf/arch/arm/util/auxtrace.c
> > +++ b/tools/perf/arch/arm/util/auxtrace.c
> > @@ -57,17 +57,15 @@ struct auxtrace_record
> >  	struct evsel *evsel;
> >  	bool found_etm = false;
> >  	struct perf_pmu *found_spe = NULL;
> > -	static struct perf_pmu **arm_spe_pmus = NULL;
> > -	static int nr_spes = 0;
> > +	struct perf_pmu **arm_spe_pmus = NULL;
> > +	int nr_spes = 0;
> >  	int i = 0;
> >  
> >  	if (!evlist)
> >  		return NULL;
> >  
> >  	cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> > -
> > -	if (!arm_spe_pmus)
> > -		arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > +	arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> >  
> >  	evlist__for_each_entry(evlist, evsel) {
> >  		if (cs_etm_pmu &&
> > @@ -84,6 +82,7 @@ struct auxtrace_record
> >  			}
> >  		}
> >  	}
> > +	free(arm_spe_pmus);
> >  
> >  	if (found_etm && found_spe) {
> >  		pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> > -- 
> > 2.17.1
> > 

-- 

- Arnaldo

Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Arnaldo Carvalho de Melo]

Em Mon, Jul 27, 2020 at 02:34:36PM -0600, Mathieu Poirier escreveu:
> On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> > - Firstly, the function auxtrace_record__init() will be invoked only
> >   once, the variable "arm_spe_pmus" will not be used afterwards, thus
> >   we don't need to check "arm_spe_pmus" is NULL or not;
> > - Another reason is, even though SPE is micro-architecture dependent,
> >   but so far it only supports "statistical-profiling-extension-v1" and
> >   we have no chance to use multiple SPE's PMU events in Perf command.
> 
> I find the above changelog somewhat out of touch with the patch itself.  The
> only thing that is happening here is the removal of a useless check and a fix
> for a memory leak.

Humm, I think the original intent of that code was to cache the results
of find_all_arm_spe_pmus(), as the variable it is assigned to is static.

So not a leak, as there was that static reference to it to reuse it
later, but that is strange in a function named "__init()" which usually
is called only once, anyway, so I think that the paragraph with
"Firstly" is kinda ok, but confusing, I think it should read:

- auxtrace_record__init() is called only once, so there is no point in
  using a static variable to cache the results of
  find_all_arm_spe_pmus(), make it local and free the results after use.

The second paragraph is SPE specific, so I'm not qualified to judge on
it.

I'm replacing the first paragraph with the version I wrote and keep it
in my local branch, please holler if you think I misunderstood.

- Arnaldo
 
> Once again whether Arnaldo wants to make the changes by hand or not you may have
> to resubmit.
> 
> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> 
> > 
> > So remove the useless check code to make it clear.
> > 
> > Signed-off-by: Wei Li <liwei391@huawei.com>
> > ---
> >  tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
> >  1 file changed, 4 insertions(+), 5 deletions(-)
> > 
> > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> > index 28a5d0c18b1d..b187bddbd01a 100644
> > --- a/tools/perf/arch/arm/util/auxtrace.c
> > +++ b/tools/perf/arch/arm/util/auxtrace.c
> > @@ -57,17 +57,15 @@ struct auxtrace_record
> >  	struct evsel *evsel;
> >  	bool found_etm = false;
> >  	struct perf_pmu *found_spe = NULL;
> > -	static struct perf_pmu **arm_spe_pmus = NULL;
> > -	static int nr_spes = 0;
> > +	struct perf_pmu **arm_spe_pmus = NULL;
> > +	int nr_spes = 0;
> >  	int i = 0;
> >  
> >  	if (!evlist)
> >  		return NULL;
> >  
> >  	cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> > -
> > -	if (!arm_spe_pmus)
> > -		arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > +	arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> >  
> >  	evlist__for_each_entry(evlist, evsel) {
> >  		if (cs_etm_pmu &&
> > @@ -84,6 +82,7 @@ struct auxtrace_record
> >  			}
> >  		}
> >  	}
> > +	free(arm_spe_pmus);
> >  
> >  	if (found_etm && found_spe) {
> >  		pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> > -- 
> > 2.17.1
> > 

-- 

- Arnaldo

Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Leo Yan]

Hi Arnaldo,

On Tue, Jul 28, 2020 at 09:02:20AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Jul 27, 2020 at 02:34:36PM -0600, Mathieu Poirier escreveu:
> > On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> > > - Firstly, the function auxtrace_record__init() will be invoked only
> > >   once, the variable "arm_spe_pmus" will not be used afterwards, thus
> > >   we don't need to check "arm_spe_pmus" is NULL or not;
> > > - Another reason is, even though SPE is micro-architecture dependent,
> > >   but so far it only supports "statistical-profiling-extension-v1" and
> > >   we have no chance to use multiple SPE's PMU events in Perf command.
> > 
> > I find the above changelog somewhat out of touch with the patch itself.  The
> > only thing that is happening here is the removal of a useless check and a fix
> > for a memory leak.
> 
> Humm, I think the original intent of that code was to cache the results
> of find_all_arm_spe_pmus(), as the variable it is assigned to is static.
> 
> So not a leak, as there was that static reference to it to reuse it
> later, but that is strange in a function named "__init()" which usually
> is called only once, anyway, so I think that the paragraph with
> "Firstly" is kinda ok, but confusing, I think it should read:
> 
> - auxtrace_record__init() is called only once, so there is no point in
>   using a static variable to cache the results of
>   find_all_arm_spe_pmus(), make it local and free the results after use.
> 
> The second paragraph is SPE specific, so I'm not qualified to judge on
> it.
> 
> I'm replacing the first paragraph with the version I wrote and keep it
> in my local branch, please holler if you think I misunderstood.

Thanks a lot for this.  These two paragraphs were coming from reviewing
and comments, but I think your rephrasing is very sufficient to describe
what this patch is doing :)

Thanks,
Leo

> > Once again whether Arnaldo wants to make the changes by hand or not you may have
> > to resubmit.
> > 
> > Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> > 
> > > 
> > > So remove the useless check code to make it clear.
> > > 
> > > Signed-off-by: Wei Li <liwei391@huawei.com>
> > > ---
> > >  tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
> > >  1 file changed, 4 insertions(+), 5 deletions(-)
> > > 
> > > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> > > index 28a5d0c18b1d..b187bddbd01a 100644
> > > --- a/tools/perf/arch/arm/util/auxtrace.c
> > > +++ b/tools/perf/arch/arm/util/auxtrace.c
> > > @@ -57,17 +57,15 @@ struct auxtrace_record
> > >  	struct evsel *evsel;
> > >  	bool found_etm = false;
> > >  	struct perf_pmu *found_spe = NULL;
> > > -	static struct perf_pmu **arm_spe_pmus = NULL;
> > > -	static int nr_spes = 0;
> > > +	struct perf_pmu **arm_spe_pmus = NULL;
> > > +	int nr_spes = 0;
> > >  	int i = 0;
> > >  
> > >  	if (!evlist)
> > >  		return NULL;
> > >  
> > >  	cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> > > -
> > > -	if (!arm_spe_pmus)
> > > -		arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > > +	arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > >  
> > >  	evlist__for_each_entry(evlist, evsel) {
> > >  		if (cs_etm_pmu &&
> > > @@ -84,6 +82,7 @@ struct auxtrace_record
> > >  			}
> > >  		}
> > >  	}
> > > +	free(arm_spe_pmus);
> > >  
> > >  	if (found_etm && found_spe) {
> > >  		pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> > > -- 
> > > 2.17.1
> > > 
> 
> -- 
> 
> - Arnaldo

Re: [PATCH v2 2/2] perf tools: ARM SPE code cleanup

[Mathieu Poirier]

On Tue, 28 Jul 2020 at 06:02, Arnaldo Carvalho de Melo <acme@kernel.org> wrote:
>
> Em Mon, Jul 27, 2020 at 02:34:36PM -0600, Mathieu Poirier escreveu:
> > On Fri, Jul 24, 2020 at 03:11:11PM +0800, Wei Li wrote:
> > > - Firstly, the function auxtrace_record__init() will be invoked only
> > >   once, the variable "arm_spe_pmus" will not be used afterwards, thus
> > >   we don't need to check "arm_spe_pmus" is NULL or not;
> > > - Another reason is, even though SPE is micro-architecture dependent,
> > >   but so far it only supports "statistical-profiling-extension-v1" and
> > >   we have no chance to use multiple SPE's PMU events in Perf command.
> >
> > I find the above changelog somewhat out of touch with the patch itself.  The
> > only thing that is happening here is the removal of a useless check and a fix
> > for a memory leak.
>
> Humm, I think the original intent of that code was to cache the results
> of find_all_arm_spe_pmus(), as the variable it is assigned to is static.

Correct, but as you pointed out below the function is called only
once.  And there is still a leak as that memory is never freed.

>
> So not a leak, as there was that static reference to it to reuse it
> later, but that is strange in a function named "__init()" which usually
> is called only once, anyway, so I think that the paragraph with
> "Firstly" is kinda ok, but confusing, I think it should read:
>
> - auxtrace_record__init() is called only once, so there is no point in
>   using a static variable to cache the results of
>   find_all_arm_spe_pmus(), make it local and free the results after use.

This is exactly what this patch does and what the changelog should read.

>
> The second paragraph is SPE specific, so I'm not qualified to judge on
> it.
>
> I'm replacing the first paragraph with the version I wrote and keep it
> in my local branch, please holler if you think I misunderstood.
>

There is no point for the next paragraph, it has no relevance to what
the code is doing.

Thanks for the editing.

> - Arnaldo
>
> > Once again whether Arnaldo wants to make the changes by hand or not you may have
> > to resubmit.
> >
> > Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> >
> > >
> > > So remove the useless check code to make it clear.
> > >
> > > Signed-off-by: Wei Li <liwei391@huawei.com>
> > > ---
> > >  tools/perf/arch/arm/util/auxtrace.c | 9 ++++-----
> > >  1 file changed, 4 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c
> > > index 28a5d0c18b1d..b187bddbd01a 100644
> > > --- a/tools/perf/arch/arm/util/auxtrace.c
> > > +++ b/tools/perf/arch/arm/util/auxtrace.c
> > > @@ -57,17 +57,15 @@ struct auxtrace_record
> > >     struct evsel *evsel;
> > >     bool found_etm = false;
> > >     struct perf_pmu *found_spe = NULL;
> > > -   static struct perf_pmu **arm_spe_pmus = NULL;
> > > -   static int nr_spes = 0;
> > > +   struct perf_pmu **arm_spe_pmus = NULL;
> > > +   int nr_spes = 0;
> > >     int i = 0;
> > >
> > >     if (!evlist)
> > >             return NULL;
> > >
> > >     cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME);
> > > -
> > > -   if (!arm_spe_pmus)
> > > -           arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > > +   arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
> > >
> > >     evlist__for_each_entry(evlist, evsel) {
> > >             if (cs_etm_pmu &&
> > > @@ -84,6 +82,7 @@ struct auxtrace_record
> > >                     }
> > >             }
> > >     }
> > > +   free(arm_spe_pmus);
> > >
> > >     if (found_etm && found_spe) {
> > >             pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n");
> > > --
> > > 2.17.1
> > >
>
> --
>
> - Arnaldo