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From: Atish Patra <atish.patra@wdc.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org
Cc: Atish Patra <atish.patra@wdc.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup.patel@wdc.com>,
	Kefeng Wang <wangkefeng.wang@huawei.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Alexander Graf <graf@amazon.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: [PATCH 0/6] Add SBI v0.2 support for KVM
Date: Mon,  3 Aug 2020 10:58:40 -0700	[thread overview]
Message-ID: <20200803175846.26272-1-atish.patra@wdc.com> (raw)

The Supervisor Binary Interface(SBI) specification[1] now defines a
base extension that provides extendability to add future extensions
while maintaining backward compatibility with previous versions.
The new version is defined as 0.2 and older version is marked as 0.1.

This series adds following features to RISC-V Linux KVM.
1. Adds support for SBI v0.2 in KVM
2. SBI Hart state management extension (HSM) in KVM
3. Ordered booting of guest vcpus in guest Linux

This series depends on the base kvm support series[2].

Guest kernel needs to also support SBI v0.2 and HSM extension in Kernel
to boot multiple vcpus. Linux kernel supports both starting v5.7.
In absense of that, guest can only boot 1vcpu.

[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
[2] http://lists.infradead.org/pipermail/linux-riscv/2020-July/001028.html

Atish Patra (6):
RISC-V: Add a non-void return for sbi v02 functions
RISC-V: Mark the existing SBI v0.1 implementation as legacy
RISC-V: Reorganize SBI code by moving legacy SBI to its own file
RISC-V: Add SBI v0.2 base extension
RISC-V: Add v0.1 replacement SBI extensions defined in v02
RISC-V: Add SBI HSM extension in KVM

arch/riscv/include/asm/kvm_vcpu_sbi.h |  32 +++++
arch/riscv/include/asm/sbi.h          |  17 ++-
arch/riscv/kernel/sbi.c               |  32 ++---
arch/riscv/kvm/Makefile               |   4 +-
arch/riscv/kvm/vcpu.c                 |  19 +++
arch/riscv/kvm/vcpu_sbi.c             | 194 ++++++++++++--------------
arch/riscv/kvm/vcpu_sbi_base.c        |  73 ++++++++++
arch/riscv/kvm/vcpu_sbi_hsm.c         | 109 +++++++++++++++
arch/riscv/kvm/vcpu_sbi_legacy.c      | 129 +++++++++++++++++
arch/riscv/kvm/vcpu_sbi_replace.c     | 136 ++++++++++++++++++
10 files changed, 619 insertions(+), 126 deletions(-)
create mode 100644 arch/riscv/include/asm/kvm_vcpu_sbi.h
create mode 100644 arch/riscv/kvm/vcpu_sbi_base.c
create mode 100644 arch/riscv/kvm/vcpu_sbi_hsm.c
create mode 100644 arch/riscv/kvm/vcpu_sbi_legacy.c
create mode 100644 arch/riscv/kvm/vcpu_sbi_replace.c

--
2.24.0


             reply	other threads:[~2020-08-03 17:59 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-03 17:58 Atish Patra [this message]
2020-08-03 17:58 ` [PATCH 1/6] RISC-V: Add a non-void return for sbi v02 functions Atish Patra
2020-08-03 17:58 ` [PATCH 2/6] RISC-V: Mark the existing SBI v0.1 implementation as legacy Atish Patra
2020-08-03 17:58 ` [PATCH 3/6] RISC-V: Reorganize SBI code by moving legacy SBI to its own file Atish Patra
2020-08-03 17:58 ` [PATCH 4/6] RISC-V: Add SBI v0.2 base extension Atish Patra
2020-08-03 17:58 ` [PATCH 5/6] RISC-V: Add v0.1 replacement SBI extensions defined in v02 Atish Patra
2020-08-03 17:58 ` [PATCH 6/6] RISC-V: Add SBI HSM extension in KVM Atish Patra
2020-11-27  8:14 ` [PATCH 0/6] Add SBI v0.2 support for KVM Anup Patel
2020-12-01  1:06   ` Atish Patra

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