* [PATCH v2] crypto/x86: Use CRC32 mnemonic in crc32c-intel_glue.c
@ 2020-08-05 11:17 Uros Bizjak
2020-08-21 7:57 ` Herbert Xu
0 siblings, 1 reply; 2+ messages in thread
From: Uros Bizjak @ 2020-08-05 11:17 UTC (permalink / raw)
To: linux-crypto, x86, linux-kernel
Cc: Uros Bizjak, Herbert Xu, David S. Miller, Thomas Gleixner,
Ingo Molnar, Borislav Petkov, H. Peter Anvin
Current minimum required version of binutils is 2.23,
which supports CRC32 instruction mnemonic.
Replace the byte-wise specification of CRC32 with this proper mnemonic.
The compiler is now able to pass memory operand to the instruction,
so there is no need for a temporary register anymore.
Some examples of the improvement:
12a: 48 8b 08 mov (%rax),%rcx
12d: f2 48 0f 38 f1 f1 crc32q %rcx,%rsi
133: 48 83 c0 08 add $0x8,%rax
137: 48 39 d0 cmp %rdx,%rax
13a: 75 ee jne 12a <crc32c_intel_update+0x1a>
to:
125: f2 48 0f 38 f1 06 crc32q (%rsi),%rax
12b: 48 83 c6 08 add $0x8,%rsi
12f: 48 39 d6 cmp %rdx,%rsi
132: 75 f1 jne 125 <crc32c_intel_update+0x15>
and:
146: 0f b6 08 movzbl (%rax),%ecx
149: f2 0f 38 f0 f1 crc32b %cl,%esi
14e: 48 83 c0 01 add $0x1,%rax
152: 48 39 d0 cmp %rdx,%rax
155: 75 ef jne 146 <crc32c_intel_update+0x36>
to:
13b: f2 0f 38 f0 02 crc32b (%rdx),%eax
140: 48 83 c2 01 add $0x1,%rdx
144: 48 39 ca cmp %rcx,%rdx
147: 75 f2 jne 13b <crc32c_intel_update+0x2b>
As the compiler has some more freedom w.r.t. register allocation,
there is also a couple of reg-reg moves removed.
There are no hidden states for CRC32 insn, so there is no need to mark
assembly as volatile.
v2: Introduce CRC32_INST define.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: "David S. Miller" <davem@davemloft.net>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: Borislav Petkov <bp@alien8.de>
CC: "H. Peter Anvin" <hpa@zytor.com>
---
arch/x86/crypto/crc32c-intel_glue.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c
index d2d069bd459b..feccb5254c7e 100644
--- a/arch/x86/crypto/crc32c-intel_glue.c
+++ b/arch/x86/crypto/crc32c-intel_glue.c
@@ -28,9 +28,9 @@
#define SCALE_F sizeof(unsigned long)
#ifdef CONFIG_X86_64
-#define REX_PRE "0x48, "
+#define CRC32_INST "crc32q %1, %q0"
#else
-#define REX_PRE
+#define CRC32_INST "crc32l %1, %0"
#endif
#ifdef CONFIG_X86_64
@@ -48,11 +48,8 @@ asmlinkage unsigned int crc_pcl(const u8 *buffer, int len,
static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)
{
while (length--) {
- __asm__ __volatile__(
- ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
- :"=S"(crc)
- :"0"(crc), "c"(*data)
- );
+ asm("crc32b %1, %0"
+ : "+r" (crc) : "rm" (*data));
data++;
}
@@ -66,11 +63,8 @@ static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len
unsigned long *ptmp = (unsigned long *)p;
while (iquotient--) {
- __asm__ __volatile__(
- ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
- :"=S"(crc)
- :"0"(crc), "c"(*ptmp)
- );
+ asm(CRC32_INST
+ : "+r" (crc) : "rm" (*ptmp));
ptmp++;
}
--
2.26.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] crypto/x86: Use CRC32 mnemonic in crc32c-intel_glue.c
2020-08-05 11:17 [PATCH v2] crypto/x86: Use CRC32 mnemonic in crc32c-intel_glue.c Uros Bizjak
@ 2020-08-21 7:57 ` Herbert Xu
0 siblings, 0 replies; 2+ messages in thread
From: Herbert Xu @ 2020-08-21 7:57 UTC (permalink / raw)
To: Uros Bizjak
Cc: linux-crypto, x86, linux-kernel, David S. Miller,
Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin
On Wed, Aug 05, 2020 at 01:17:29PM +0200, Uros Bizjak wrote:
> Current minimum required version of binutils is 2.23,
> which supports CRC32 instruction mnemonic.
>
> Replace the byte-wise specification of CRC32 with this proper mnemonic.
> The compiler is now able to pass memory operand to the instruction,
> so there is no need for a temporary register anymore.
>
> Some examples of the improvement:
>
> 12a: 48 8b 08 mov (%rax),%rcx
> 12d: f2 48 0f 38 f1 f1 crc32q %rcx,%rsi
> 133: 48 83 c0 08 add $0x8,%rax
> 137: 48 39 d0 cmp %rdx,%rax
> 13a: 75 ee jne 12a <crc32c_intel_update+0x1a>
>
> to:
>
> 125: f2 48 0f 38 f1 06 crc32q (%rsi),%rax
> 12b: 48 83 c6 08 add $0x8,%rsi
> 12f: 48 39 d6 cmp %rdx,%rsi
> 132: 75 f1 jne 125 <crc32c_intel_update+0x15>
>
> and:
>
> 146: 0f b6 08 movzbl (%rax),%ecx
> 149: f2 0f 38 f0 f1 crc32b %cl,%esi
> 14e: 48 83 c0 01 add $0x1,%rax
> 152: 48 39 d0 cmp %rdx,%rax
> 155: 75 ef jne 146 <crc32c_intel_update+0x36>
>
> to:
>
> 13b: f2 0f 38 f0 02 crc32b (%rdx),%eax
> 140: 48 83 c2 01 add $0x1,%rdx
> 144: 48 39 ca cmp %rcx,%rdx
> 147: 75 f2 jne 13b <crc32c_intel_update+0x2b>
>
> As the compiler has some more freedom w.r.t. register allocation,
> there is also a couple of reg-reg moves removed.
>
> There are no hidden states for CRC32 insn, so there is no need to mark
> assembly as volatile.
>
> v2: Introduce CRC32_INST define.
>
> Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
> CC: Herbert Xu <herbert@gondor.apana.org.au>
> CC: "David S. Miller" <davem@davemloft.net>
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Ingo Molnar <mingo@redhat.com>
> CC: Borislav Petkov <bp@alien8.de>
> CC: "H. Peter Anvin" <hpa@zytor.com>
> ---
> arch/x86/crypto/crc32c-intel_glue.c | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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