[PATCH 0/3] arm64: dts: meson-axg-s400: add support for MIPI-DSI Panel

[PATCH 0/3] arm64: dts: meson-axg-s400: add support for MIPI-DSI Panel

[Neil Armstrong]

This adds the nodes to AXG and S400 board to enabled MIPI-DSI display support with
the 1024*600 tl070wsh30 DSI panel.

Dependencies:
- Patch 1: [1] & [2]
- Patch 2: [1], [3] & [4]
- Patch 3: [5]

[1] https://lore.kernel.org/r/20200907081825.1654-1-narmstrong@baylibre.com
[2] https://lore.kernel.org/r/20200904161654.24141-1-narmstrong@baylibre.com
[3] https://lore.kernel.org/r/20200907072708.26043-1-narmstrong@baylibre.com
[4] https://lore.kernel.org/r/20200907073402.26674-1-narmstrong@baylibre.com
[5] https://lore.kernel.org/r/20200904161504.23915-1-narmstrong@baylibre.com

Neil Armstrong (3):
  arm64: dts: meson-axg: add VPU and PWRC nodes
  arm64: dts: meson-axg: add MIPI DSI Nodes
  arm64: dts: meson-axg-s400: add MIPI DSI panel nodes

 .../arm64/boot/dts/amlogic/meson-axg-s400.dts |  49 +++++++-
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi    | 118 ++++++++++++++++++
 2 files changed, 166 insertions(+), 1 deletion(-)

-- 
2.22.0

[PATCH 1/3] arm64: dts: meson-axg: add VPU and PWRC nodes

[Neil Armstrong]

This add the display VPU node and the power controller PWRC node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 58 ++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index b9efc8469265..4a93e3fecd90 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
+#include <dt-bindings/power/meson-axg-power.h>
 
 / {
 	compatible = "amlogic,meson-axg";
@@ -187,6 +188,7 @@
 				      "timing-adjustment";
 			rx-fifo-depth = <4096>;
 			tx-fifo-depth = <2048>;
+			power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
 			status = "disabled";
 		};
 
@@ -1117,6 +1119,46 @@
 					clocks = <&xtal>;
 					clock-names = "xtal";
 				};
+
+				pwrc: power-controller {
+					compatible = "amlogic,meson-axg-pwrc";
+					#power-domain-cells = <1>;
+					amlogic,ao-sysctrl = <&sysctrl_AO>;
+					resets = <&reset RESET_VIU>,
+						 <&reset RESET_VENC>,
+						 <&reset RESET_VCBUS>,
+						 <&reset RESET_VENCL>,
+						 <&reset RESET_VID_LOCK>;
+					reset-names = "viu", "venc", "vcbus",
+						      "vencl", "vid_lock";
+					clocks = <&clkc CLKID_VPU>,
+						 <&clkc CLKID_VAPB>;
+					clock-names = "vpu", "vapb";
+					/*
+					 * VPU clocking is provided by two identical clock paths
+					 * VPU_0 and VPU_1 muxed to a single clock by a glitch
+					 * free mux to safely change frequency while running.
+					 * Same for VAPB but with a final gate after the glitch free mux.
+					 */
+					assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
+							  <&clkc CLKID_VPU_0>,
+							  <&clkc CLKID_VPU>, /* Glitch free mux */
+							  <&clkc CLKID_VAPB_0_SEL>,
+							  <&clkc CLKID_VAPB_0>,
+							  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
+					assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
+								 <0>, /* Do Nothing */
+								 <&clkc CLKID_VPU_0>,
+								 <&clkc CLKID_FCLK_DIV4>,
+								 <0>, /* Do Nothing */
+								 <&clkc CLKID_VAPB_0>;
+					assigned-clock-rates = <0>, /* Do Nothing */
+							       <250000000>,
+							       <0>, /* Do Nothing */
+							       <0>, /* Do Nothing */
+							       <250000000>,
+							       <0>; /* Do Nothing */
+				};
 			};
 		};
 
@@ -1563,6 +1605,22 @@
 			};
 		};
 
+		vpu: vpu@ff900000 {
+			compatible = "amlogic,meson-axg-vpu";
+			reg = <0x0 0xff900000 0x0 0x100000>,
+			      <0x0 0xff63c000 0x0 0x1000>;
+			reg-names = "vpu", "hhi";
+			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
+			power-domains = <&pwrc PWRC_AXG_VPU_ID>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			/* DPI output port */
+			dpi_port: port@2 {
+				reg = <2>;
+			};
+		};
+
 		gic: interrupt-controller@ffc01000 {
 			compatible = "arm,gic-400";
 			reg = <0x0 0xffc01000 0 0x1000>,
-- 
2.22.0

Re: [PATCH 1/3] arm64: dts: meson-axg: add VPU and PWRC nodes

[Martin Blumenstingl]

Hi Neil,

On Mon, Sep 7, 2020 at 10:33 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This add the display VPU node and the power controller PWRC node.
s/add/adds/

> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[...]
> +               vpu: vpu@ff900000 {
> +                       compatible = "amlogic,meson-axg-vpu";
> +                       reg = <0x0 0xff900000 0x0 0x100000>,
> +                             <0x0 0xff63c000 0x0 0x1000>;
my plan is to replace the "hhi" binding with a reference to the HHI
syscon - but at the same time I'm not sure if it's a good idea (or
whether for example CVBS support should be split off into a sub-driver
which is then part of the HHI MFD syscon).
maybe we can align at some point about the next steps with the the DRM
driver (as I want to add support for the older gen SoCs still)
that's nothing for this patch though


Best regards,
Martin

Re: [PATCH 1/3] arm64: dts: meson-axg: add VPU and PWRC nodes

[Neil Armstrong]

On 15/09/2020 21:50, Martin Blumenstingl wrote:
> Hi Neil,
> 
> On Mon, Sep 7, 2020 at 10:33 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> This add the display VPU node and the power controller PWRC node.
> s/add/adds/
> 
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> 
> [...]
>> +               vpu: vpu@ff900000 {
>> +                       compatible = "amlogic,meson-axg-vpu";
>> +                       reg = <0x0 0xff900000 0x0 0x100000>,
>> +                             <0x0 0xff63c000 0x0 0x1000>;
> my plan is to replace the "hhi" binding with a reference to the HHI
> syscon - but at the same time I'm not sure if it's a good idea (or
> whether for example CVBS support should be split off into a sub-driver
> which is then part of the HHI MFD syscon).

It's also my plan, yes until we get 100% rid of HHI access from DRM driver,
we still need it.

It you want to push it, please do it !

Neil

> maybe we can align at some point about the next steps with the the DRM
> driver (as I want to add support for the older gen SoCs still)
> that's nothing for this patch though
> 
> 
> Best regards,
> Martin
> 

[PATCH 2/3] arm64: dts: meson-axg: add MIPI DSI Nodes

[Neil Armstrong]

This adds the nodes for :
- MIPI DSI+PCIe analog phy
- MIPI D-PHY
- Synopsys MIPI-DSI Transceiver

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 4a93e3fecd90..f1501b19f617 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
 #include <dt-bindings/power/meson-axg-power.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
 	compatible = "amlogic,meson-axg";
@@ -1111,6 +1112,8 @@
 			sysctrl: system-controller@0 {
 				compatible = "amlogic,meson-axg-hhi-sysctrl",
 					     "simple-mfd", "syscon";
+				#address-cells = <2>;
+				#size-cells = <2>;
 				reg = <0 0 0 0x400>;
 
 				clkc: clock-controller {
@@ -1159,6 +1162,12 @@
 							       <250000000>,
 							       <0>; /* Do Nothing */
 				};
+
+				mipi_pcie_analog_dphy: phy {
+					compatible = "amlogic,axg-mipi-pcie-analog-phy";
+					#phy-cells = <0>;
+					status = "disabled";
+				};
 			};
 		};
 
@@ -1171,6 +1180,19 @@
 			#mbox-cells = <1>;
 		};
 
+		mipi_dphy: phy@ff640000 {
+			compatible = "amlogic,axg-mipi-dphy";
+			reg = <0x0 0xff640000 0x0 0x100>;
+			clocks = <&clkc CLKID_MIPI_DSI_PHY>;
+			clock-names = "pclk";
+			resets = <&reset RESET_MIPI_PHY>;
+			reset-names = "phy";
+			phys = <&mipi_pcie_analog_dphy>;
+			phy-names = "analog";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		audio: bus@ff642000 {
 			compatible = "simple-bus";
 			reg = <0x0 0xff642000 0x0 0x2000>;
@@ -1618,6 +1640,10 @@
 			/* DPI output port */
 			dpi_port: port@2 {
 				reg = <2>;
+
+				dpi_out: endpoint {
+					remote-endpoint = <&mipi_dsi_in>;
+				};
 			};
 		};
 
@@ -1647,6 +1673,40 @@
 				#reset-cells = <1>;
 			};
 
+			mipi_dsi: dsi@7000 {
+				compatible = "amlogic,meson-axg-dw-mipi-dsi";
+				reg = <0x0 0x6000 0x0 0x400>;
+				resets = <&reset RESET_MIPI_HOST>;
+				reset-names = "top";
+				clocks = <&clkc CLKID_MIPI_DSI_HOST>,
+					 <&clkc CLKID_GP0_PLL>;
+				clock-names = "pclk", "px_clk";
+				phys = <&mipi_dphy>;
+				phy-names = "dphy";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					/* VPU VENC Input */
+					mipi_dsi_venc_port: port@0 {
+						reg = <0>;
+
+						mipi_dsi_in: endpoint {
+							remote-endpoint = <&dpi_out>;
+						};
+					};
+
+					/* DSI Output */
+					mipi_dsi_panel_port: port@1 {
+						reg = <1>;
+					};
+				};
+			};
+
 			gpio_intc: interrupt-controller@f080 {
 				compatible = "amlogic,meson-axg-gpio-intc",
 					     "amlogic,meson-gpio-intc";
-- 
2.22.0

[PATCH 3/3] arm64: dts: meson-axg-s400: add MIPI DSI panel nodes

[Neil Armstrong]

This adds the nodes for :
- Backlight of the tl070wsh30 panel
- MIPI-DSI attributes
- TDO TL070WSH30 TFT-LCD panel

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 .../arm64/boot/dts/amlogic/meson-axg-s400.dts | 49 ++++++++++++++++++-
 1 file changed, 48 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index cb1360ae1211..abfad67ca06b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
@@ -7,6 +7,7 @@
 
 #include "meson-axg.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
 
 / {
 	compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
@@ -116,6 +117,16 @@
 		reg = <0x0 0x0 0x0 0x40000000>;
 	};
 
+	panel_backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm_ab 1 78125 PWM_POLARITY_INVERTED>;
+		enable-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc_5v>;
+		brightness-levels = <0 255>;
+		num-interpolated-steps = <255>;
+		default-brightness-level = <250>;
+	};
+
 	main_12v: regulator-main_12v {
 		compatible = "regulator-fixed";
 		regulator-name = "12V";
@@ -434,6 +445,42 @@
 	};
 };
 
+
+&mipi_dsi {
+	status = "okay";
+
+	assigned-clocks = <&clkc CLKID_GP0_PLL>;
+	assigned-clock-rates = <283500000>;
+
+	panel@0 {
+		compatible = "tdo,tl070wsh30";
+		reset-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_LOW>;
+		power-supply = <&vcc_3v3>;
+		backlight = <&panel_backlight>;
+		reg = <0>;
+
+		port {
+			mipi_in_panel: endpoint {
+				remote-endpoint = <&mipi_out_panel>;
+			};
+		};
+	};
+};
+
+&mipi_pcie_analog_dphy {
+	status = "okay";
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&mipi_dsi_panel_port {
+	mipi_out_panel: endpoint {
+		remote-endpoint = <&mipi_in_panel>;
+	};
+};
+
 &pdm {
 	pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>,
 		    <&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>;
@@ -443,7 +490,7 @@
 
 &pwm_ab {
 	status = "okay";
-	pinctrl-0 = <&pwm_a_x20_pins>;
+	pinctrl-0 = <&pwm_a_x20_pins>, <&pwm_b_z_pins>;
 	pinctrl-names = "default";
 };
 
-- 
2.22.0

Re: [PATCH 0/3] arm64: dts: meson-axg-s400: add support for MIPI-DSI Panel

[Neil Armstrong]

On 07/09/2020 10:32, Neil Armstrong wrote:
> This adds the nodes to AXG and S400 board to enabled MIPI-DSI display support with
> the 1024*600 tl070wsh30 DSI panel.
> 
> Dependencies:
> - Patch 1: [1] & [2]
> - Patch 2: [1], [3] & [4]
> - Patch 3: [5]
> 
> [1] https://lore.kernel.org/r/20200907081825.1654-1-narmstrong@baylibre.com
> [2] https://lore.kernel.org/r/20200904161654.24141-1-narmstrong@baylibre.com
> [3] https://lore.kernel.org/r/20200907072708.26043-1-narmstrong@baylibre.com
> [4] https://lore.kernel.org/r/20200907073402.26674-1-narmstrong@baylibre.com
> [5] https://lore.kernel.org/r/20200904161504.23915-1-narmstrong@baylibre.com
> 
> Neil Armstrong (3):
>   arm64: dts: meson-axg: add VPU and PWRC nodes
>   arm64: dts: meson-axg: add MIPI DSI Nodes
>   arm64: dts: meson-axg-s400: add MIPI DSI panel nodes
> 
>  .../arm64/boot/dts/amlogic/meson-axg-s400.dts |  49 +++++++-
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    | 118 ++++++++++++++++++
>  2 files changed, 166 insertions(+), 1 deletion(-)
> 

I extracted the PWRC & DSI PHY nodes into 20201120152131.3918814-1-narmstrong@baylibre.com

Will send the CPU & panel nodes when the DRM codes is merged.

Neil